linux-kernel - Re: [PATCH 1/7] dt-bindings: Document Tegra SDHCI pinctrl bindings

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Message-ID: <13b93496-0f35-2fe4-c713-352a139433d6@kapsi.fi>
Date:   Wed, 25 Jul 2018 09:47:12 +0300
From:   Mikko Perttunen <cyndis@...si.fi>
To:     Aapo Vienamo <avienamo@...dia.com>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        Thierry Reding <thierry.reding@...il.com>,
        Jonathan Hunter <jonathanh@...dia.com>,
        Adrian Hunter <adrian.hunter@...el.com>,
        Mikko Perttunen <mperttunen@...dia.com>
Cc:     linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
        linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/7] dt-bindings: Document Tegra SDHCI pinctrl bindings

I would maybe say "dt-bindings: mmc: tegra: Add pad voltage control 
properties" or similar for the subject - the current kind of looks like 
the SDHCI controller is a pinctrl device :)

Reviewed-by: Mikko Perttunen <mperttunen@...dia.com>

On 20.07.2018 15:45, Aapo Vienamo wrote:
> Document the pinctrl bindings used by the SDHCI driver to reconfigure
> pad voltages on controllers supporting multiple voltage levels.
> 
> Signed-off-by: Aapo Vienamo <avienamo@...dia.com>
> ---
>   .../bindings/mmc/nvidia,tegra20-sdhci.txt          | 22 ++++++++++++++++++++++
>   1 file changed, 22 insertions(+)
> 
> diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
> index 9bce578..90c214d 100644
> --- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
> +++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
> @@ -38,3 +38,25 @@ sdhci@...00200 {
>   	power-gpios = <&gpio 155 0>; /* gpio PT3 */
>   	bus-width = <8>;
>   };
> +
> +Optional properties for Tegra210 and Tegra186:
> +- pinctrl-names, pinctrl-0, pinctrl-1 : Specify pad voltage
> +  configurations. Valid pinctrl-names are "sdmmc-3v3" and "sdmmc-1v8"
> +  for controllers supporting multiple voltage levels. The order of names
> +  should correspond to the pin configuration states in pinctrl-0 and
> +  pinctrl-1.
> +
> +Example:
> +sdhci@...b0000 {
> +	compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
> +	reg = <0x0 0x700b0000 0x0 0x200>;
> +	interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
> +	clocks = <&tegra_car TEGRA210_CLK_SDMMC1>;
> +	clock-names = "sdhci";
> +	resets = <&tegra_car 14>;
> +	reset-names = "sdhci";
> +	pinctrl-names = "sdmmc-3v3", "sdmmc-1v8";
> +	pinctrl-0 = <&sdmmc1_3v3>;
> +	pinctrl-1 = <&sdmmc1_1v8>;
> +	status = "disabled";
> +};
>