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Date: Wed, 25 Jul 2018 10:24:01 +0300
From: Mikko Perttunen <cyndis@...si.fi>
To: Aapo Vienamo <avienamo@...dia.com>,
Ulf Hansson <ulf.hansson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Thierry Reding <thierry.reding@...il.com>,
Jonathan Hunter <jonathanh@...dia.com>,
Adrian Hunter <adrian.hunter@...el.com>,
Mikko Perttunen <mperttunen@...dia.com>
Cc: linux-mmc@...r.kernel.org, devicetree@...r.kernel.org,
linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 06/10] mmc: tegra: Program pad autocal offsets from dt
On 24.07.2018 17:34, Aapo Vienamo wrote:
> Parse the pad drive strength calibration offsets from the device tree.
> Program the calibration offsets in accordance with the current signaling
> mode.
>
> Signed-off-by: Aapo Vienamo <avienamo@...dia.com>
> ---
> drivers/mmc/host/sdhci-tegra.c | 147 ++++++++++++++++++++++++++++++++++++++++-
> 1 file changed, 146 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/mmc/host/sdhci-tegra.c b/drivers/mmc/host/sdhci-tegra.c
> index 0de74f4..78781bd 100644
> --- a/drivers/mmc/host/sdhci-tegra.c
> +++ b/drivers/mmc/host/sdhci-tegra.c
> @@ -48,6 +48,7 @@
> #define SDHCI_TEGRA_AUTO_CAL_CONFIG 0x1e4
> #define SDHCI_AUTO_CAL_START BIT(31)
> #define SDHCI_AUTO_CAL_ENABLE BIT(29)
> +#define SDHCI_AUTO_CAL_PDPU_OFFSET_MASK 0x0000ffff
>
> #define SDHCI_TEGRA_SDMEM_COMP_PADCTRL 0x1e0
> #define SDHCI_TEGRA_SDMEM_COMP_PADCTRL_VREF_SEL_MASK 0x0000000f
> @@ -71,6 +72,22 @@ struct sdhci_tegra_soc_data {
> u32 nvquirks;
> };
>
> +/* Magic pull up and pull down pad calibration offsets */
> +struct sdhci_tegra_autocal_offsets {
> + u8 pull_up_3v3;
> + u8 pull_down_3v3;
> + u8 pull_up_3v3_timeout;
> + u8 pull_down_3v3_timeout;
> + u8 pull_up_1v8;
> + u8 pull_down_1v8;
> + u8 pull_up_1v8_timeout;
> + u8 pull_down_1v8_timeout;
> + u8 pull_up_sdr104;
> + u8 pull_down_sdr104;
> + u8 pull_up_hs400;
> + u8 pull_down_hs400;
> +}; > +
> struct sdhci_tegra {
> const struct sdhci_tegra_soc_data *soc_data;
> struct gpio_desc *power_gpio;
> @@ -82,6 +99,8 @@ struct sdhci_tegra {
> struct pinctrl *pinctrl_sdmmc;
> struct pinctrl_state *pinctrl_state_3v3;
> struct pinctrl_state *pinctrl_state_1v8;
> +
> + struct sdhci_tegra_autocal_offsets autocal_offsets;
> };
>
> static u16 tegra_sdhci_readw(struct sdhci_host *host, int reg)
> @@ -248,12 +267,45 @@ static bool tegra_sdhci_configure_card_clk(struct sdhci_host *host, bool enable)
> return orig_enabled;
> }
>
> +static void tegra_sdhci_set_pad_autocal_offset(struct sdhci_host *host,
> + u16 pdpu)
> +{
> + u32 reg;
> +
> + reg = sdhci_readl(host, SDHCI_TEGRA_AUTO_CAL_CONFIG);
> + reg &= ~SDHCI_AUTO_CAL_PDPU_OFFSET_MASK;
> + reg |= pdpu;
> + sdhci_writel(host, reg, SDHCI_TEGRA_AUTO_CAL_CONFIG);
> +}
> +
> static void tegra_sdhci_pad_autocalib(struct sdhci_host *host)
> {
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);
> + struct sdhci_tegra_autocal_offsets offsets =
> + tegra_host->autocal_offsets;
> + struct mmc_ios *ios = &host->mmc->ios;
> unsigned timeout = 10;
> bool card_clk_enabled;
> + u16 pdpu;
> u32 reg;
>
> + switch (ios->timing) {
> + case MMC_TIMING_UHS_SDR104:
> + pdpu = offsets.pull_down_sdr104 << 8 | offsets.pull_up_sdr104;
> + break;
> + case MMC_TIMING_MMC_HS400:
> + pdpu = offsets.pull_down_hs400 << 8 | offsets.pull_up_hs400;
> + break;
> + default:
> + if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180)
> + pdpu = offsets.pull_down_1v8 << 8 | offsets.pull_up_1v8;
> + else
> + pdpu = offsets.pull_down_3v3 << 8 | offsets.pull_up_3v3;
> + }
> +
> + tegra_sdhci_set_pad_autocal_offset(host, pdpu);
> +
> card_clk_enabled = tegra_sdhci_configure_card_clk(host, false);
>
> tegra_sdhci_configure_cal_pad(host, true);
> @@ -275,8 +327,99 @@ static void tegra_sdhci_pad_autocalib(struct sdhci_host *host)
>
> tegra_sdhci_configure_card_clk(host, card_clk_enabled);
>
> - if (timeout == 0)
> + if (timeout == 0) {
> dev_err(mmc_dev(host->mmc), "Pad autocal timed out\n");
> +
> + if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_180)
> + pdpu = offsets.pull_down_1v8_timeout << 8 |
> + offsets.pull_up_1v8_timeout;
> + else
> + pdpu = offsets.pull_down_3v3_timeout << 8 |
> + offsets.pull_up_3v3_timeout;
> +
> + tegra_sdhci_set_pad_autocal_offset(host, pdpu);
> + }
> +}
> +
> +static void tegra_sdhci_parse_pad_autocal_dt(struct sdhci_host *host)
> +{
> + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> + struct sdhci_tegra *tegra_host = sdhci_pltfm_priv(pltfm_host);
> + struct sdhci_tegra_autocal_offsets *autocal =
> + &tegra_host->autocal_offsets;
> + int err;
> +
> + err = device_property_read_u8(host->mmc->parent,
> + "pad-autocal-pull-up-offset-3v3",
> + &autocal->pull_up_3v3);
> + if (err)
> + autocal->pull_up_3v3 = 0;
> +
If you read these properties using read_u8, they'll need to be specified
in the device tree as "property = /bits/ 8 <...>;", which might not be
desirable.
> + err = device_property_read_u8(host->mmc->parent,
> + "pad-autocal-pull-down-offset-3v3",
> + &autocal->pull_down_3v3);
> + if (err)
> + autocal->pull_down_3v3 = 0;
> +
> + err = device_property_read_u8(host->mmc->parent,
> + "pad-autocal-pull-up-offset-1v8",
> + &autocal->pull_up_1v8);
> + if (err)
> + autocal->pull_up_1v8 = 0;
> +
> + err = device_property_read_u8(host->mmc->parent,
> + "pad-autocal-pull-down-offset-1v8",
> + &autocal->pull_down_1v8);
> + if (err)
> + autocal->pull_down_1v8 = 0;
> +
> + err = device_property_read_u8(host->mmc->parent,
> + "pad-autocal-pull-up-offset-3v3-timeout",
> + &autocal->pull_up_3v3);
> + if (err)
> + autocal->pull_up_3v3_timeout = 0;
> +
> + err = device_property_read_u8(host->mmc->parent,
> + "pad-autocal-pull-down-offset-3v3-timeout",
> + &autocal->pull_down_3v3);
> + if (err)
> + autocal->pull_down_3v3_timeout = 0;
> +
> + err = device_property_read_u8(host->mmc->parent,
> + "pad-autocal-pull-up-offset-1v8-timeout",
> + &autocal->pull_up_1v8);
> + if (err)
> + autocal->pull_up_1v8_timeout = 0;
> +
> + err = device_property_read_u8(host->mmc->parent,
> + "pad-autocal-pull-down-offset-1v8-timeout",
> + &autocal->pull_down_1v8);
> + if (err)
> + autocal->pull_down_1v8_timeout = 0;
> +
> + err = device_property_read_u8(host->mmc->parent,
> + "pad-autocal-pull-up-offset-sdr104",
> + &autocal->pull_up_sdr104);
> + if (err)
> + autocal->pull_up_sdr104 = autocal->pull_up_1v8;
> +
> + err = device_property_read_u8(host->mmc->parent,
> + "pad-autocal-pull-down-offset-sdr104",
> + &autocal->pull_down_sdr104);
> + if (err)
> + autocal->pull_down_sdr104 = autocal->pull_down_1v8;
> +
> + err = device_property_read_u8(host->mmc->parent,
> + "pad-autocal-pull-up-offset-hs400",
> + &autocal->pull_up_hs400);
> + if (err)
> + autocal->pull_up_hs400 = autocal->pull_up_1v8;
> +
> + err = device_property_read_u8(host->mmc->parent,
> + "pad-autocal-pull-down-offset-hs400",
> + &autocal->pull_down_hs400);
> + if (err)
> + autocal->pull_down_hs400 = autocal->pull_down_1v8;
> }
>
> static void tegra_sdhci_set_clock(struct sdhci_host *host, unsigned int clock)
> @@ -638,6 +781,8 @@ static int sdhci_tegra_probe(struct platform_device *pdev)
> if (tegra_host->soc_data->nvquirks & NVQUIRK_ENABLE_DDR50)
> host->mmc->caps |= MMC_CAP_1_8V_DDR;
>
> + tegra_sdhci_parse_pad_autocal_dt(host);
> +
> tegra_host->power_gpio = devm_gpiod_get_optional(&pdev->dev, "power",
> GPIOD_OUT_HIGH);
> if (IS_ERR(tegra_host->power_gpio)) {
>
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