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Message-ID: <CAE=gft5m_upt4hhPf3ZbCm99usoaW_OXibxM2XzFEgvwLmjnKQ@mail.gmail.com>
Date: Wed, 25 Jul 2018 13:26:18 -0700
From: Evan Green <evgreen@...omium.org>
To: vivek.gautam@...eaurora.org
Cc: cang@...eaurora.org, subhashj@...eaurora.org,
asutoshd@...eaurora.org, Manu Gautam <mgautam@...eaurora.org>,
kishon@...com, robh+dt@...nel.org, mark.rutland@....com,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-msm@...r.kernel.org
Subject: Re: [PATCH v7 1/4] phy: Update PHY power control sequence
On Mon, Jul 2, 2018 at 10:00 AM Vivek Gautam
<vivek.gautam@...eaurora.org> wrote:
>
> On Tue, Jun 19, 2018 at 2:06 PM, Can Guo <cang@...eaurora.org> wrote:
> > All PHYs should be powered on before register configuration starts. And
> > only PCIe PHYs need an extra power control before deasserts reset state.
> >
> > Signed-off-by: Can Guo <cang@...eaurora.org>
> > ---
> > drivers/phy/qualcomm/phy-qcom-qmp.c | 19 ++++++++++++-------
> > 1 file changed, 12 insertions(+), 7 deletions(-)
> >
Reviewed-by: Evan Green <evgreen@...omium.org>
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