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Message-Id: <1532488822-5622-2-git-send-email-alanx.chiang@intel.com>
Date: Wed, 25 Jul 2018 11:20:21 +0800
From: alanx.chiang@...el.com
To: linux-i2c@...r.kernel.org
Cc: andy.yeh@...el.com, sakari.ailus@...ux.intel.com,
andriy.shevchenko@...ux.intel.com, andriy.shevchenko@...el.com,
rajmohan.mani@...el.com, andy.shevchenko@...il.com,
tfiga@...omium.org, jcliang@...omium.org, brgl@...ev.pl,
robh+dt@...nel.org, mark.rutland@....com, arnd@...db.de,
rpjday@...shcourse.ca, gregkh@...uxfoundation.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
Alan Chiang <alanx.chiang@...el.com>
Subject: [RESEND PATCH v4 1/2] dt-bindings: at24: Add address-width property
From: Alan Chiang <alanx.chiang@...el.com>
Currently the only way to use a variant of a supported model with
a different address with a different address width is to define a
new compatible string and the corresponding chip data structure.
Provide a flexible way to specify the size of the address pointer
by defining a new property: address-width.
Signed-off-by: Alan Chiang <alanx.chiang@...el.com>
Signed-off-by: Andy Yeh <andy.yeh@...el.com>
Acked-by: Sakari Ailus <sakari.ailus@...ux.intel.com>
Reviewed-by: Rob Herring <robh@...nel.org>
---
Documentation/devicetree/bindings/eeprom/at24.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/eeprom/at24.txt b/Documentation/devicetree/bindings/eeprom/at24.txt
index 61d833a..aededdb 100644
--- a/Documentation/devicetree/bindings/eeprom/at24.txt
+++ b/Documentation/devicetree/bindings/eeprom/at24.txt
@@ -72,6 +72,8 @@ Optional properties:
- wp-gpios: GPIO to which the write-protect pin of the chip is connected.
+ - address-width: number of address bits (one of 8, 16).
+
Example:
eeprom@52 {
--
2.7.4
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