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Message-ID: <153255409888.48062.18427465027530245711@swboyd.mtv.corp.google.com>
Date: Wed, 25 Jul 2018 14:28:18 -0700
From: Stephen Boyd <sboyd@...nel.org>
To: Aapo Vienamo <avienamo@...dia.com>,
Peter De Schrijver <pdeschrijver@...dia.com>
Cc: Prashant Gaikwad <pgaikwad@...dia.com>,
Michael Turquette <mturquette@...libre.com>,
Thierry Reding <thierry.reding@...il.com>,
Jonathan Hunter <jonathanh@...dia.com>,
linux-kernel@...r.kernel.org, linux-clk@...r.kernel.org,
linux-tegra@...r.kernel.org, Aapo Vienamo <avienamo@...dia.com>
Subject: Re: [PATCH v6 3/4] clk: tegra: Add sdmmc mux divider clock
Quoting Aapo Vienamo (2018-07-12 04:53:01)
> From: Peter De-Schrijver <pdeschrijver@...dia.com>
>
> Add a clock type to model the sdmmc switch divider clocks which have paths
> to source clocks bypassing the divider (Low Jitter paths). These
> are handled by selecting the lj path when the divider is 1 (ie the
> rate is the parent rate), otherwise the normal path with divider
> will be selected. Otherwise this clock behaves as a normal peripheral
> clock.
>
> Signed-off-by: Peter De-Schrijver <pdeschrijver@...dia.com>
> Signed-off-by: Aapo Vienamo <avienamo@...dia.com>
> Acked-by: Peter De Schrijver <pdeschrijver@...dia.com>
> ---
Applied to clk-next
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