linux-kernel - Re: [PATCH 1/6] RISC-V: simplify software interrupt / IPI code

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:   Wed, 25 Jul 2018 14:44:32 -0700 (PDT)
From:   Palmer Dabbelt <palmer@...ive.com>
To:     Christoph Hellwig <hch@....de>
CC:     tglx@...utronix.de, jason@...edaemon.net, marc.zyngier@....com,
        robh+dt@...nel.org, mark.rutland@....com,
        devicetree@...r.kernel.org, aou@...s.berkeley.edu,
        linux-kernel@...r.kernel.org, linux-riscv@...ts.infradead.org,
        shorne@...il.com
Subject:     Re: [PATCH 1/6] RISC-V: simplify software interrupt / IPI code

On Wed, 25 Jul 2018 02:36:44 PDT (-0700), Christoph Hellwig wrote:
> Rename handle_ipi to riscv_software_interrupt, drop the unused return
> value and provide a stub for the !SMP build.  This allows simplifying
> the upcoming interrupt controller driver by not providing a wrapper
> for it.
>
> Signed-off-by: Christoph Hellwig <hch@....de>
> ---
>  arch/riscv/include/asm/smp.h | 13 +++++++++++--
>  arch/riscv/kernel/smp.c      |  6 ++----
>  2 files changed, 13 insertions(+), 6 deletions(-)
>
> diff --git a/arch/riscv/include/asm/smp.h b/arch/riscv/include/asm/smp.h
> index 85e4220839b0..80ecb957fe9f 100644
> --- a/arch/riscv/include/asm/smp.h
> +++ b/arch/riscv/include/asm/smp.h
> @@ -44,8 +44,17 @@ void arch_send_call_function_single_ipi(int cpu);
>   */
>  #define raw_smp_processor_id() (*((int*)((char*)get_current() + TASK_TI_CPU)))
>
> -/* Interprocessor interrupt handler */
> -irqreturn_t handle_ipi(void);
> +/* Software interrupt handler */
> +void riscv_software_interrupt(void);
> +
> +#else /* CONFIG_SMP */
> +
> +/*
> + * We currently only use software interrupts to pass inter-processor
> + * interrupts, so if a non-SMP system gets a software interrupt then we
> + * don't know what to do.
> + */
> +#define riscv_software_interrupt()	WARN_ON()
>
>  #endif /* CONFIG_SMP */
>
> diff --git a/arch/riscv/kernel/smp.c b/arch/riscv/kernel/smp.c
> index 6d3962435720..906fe21ea21b 100644
> --- a/arch/riscv/kernel/smp.c
> +++ b/arch/riscv/kernel/smp.c
> @@ -45,7 +45,7 @@ int setup_profiling_timer(unsigned int multiplier)
>  	return -EINVAL;
>  }
>
> -irqreturn_t handle_ipi(void)
> +void riscv_software_interrupt(void)
>  {
>  	unsigned long *pending_ipis = &ipi_data[smp_processor_id()].bits;
>
> @@ -60,7 +60,7 @@ irqreturn_t handle_ipi(void)
>
>  		ops = xchg(pending_ipis, 0);
>  		if (ops == 0)
> -			return IRQ_HANDLED;
> +			return;
>
>  		if (ops & (1 << IPI_RESCHEDULE))
>  			scheduler_ipi();
> @@ -73,8 +73,6 @@ irqreturn_t handle_ipi(void)
>  		/* Order data access and bit testing. */
>  		mb();
>  	}
> -
> -	return IRQ_HANDLED;
>  }
>
>  static void

Acked-by: Palmer Dabbelt <palmer@...ive.com>

I think it's probably easier to have the whole patch set go through the IRQ
tree, so I won't put these in the RISC-V tree unless someone says something.