lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <e5e24974662564d2501b28ac6faf0b09@agner.ch>
Date:   Thu, 26 Jul 2018 10:42:10 +0200
From:   Stefan Agner <stefan@...er.ch>
To:     Marcel Ziswiler <marcel@...wiler.com>
Cc:     devicetree@...r.kernel.org, linux-tegra@...r.kernel.org,
        Marcel Ziswiler <marcel.ziswiler@...adex.com>,
        Thierry Reding <thierry.reding@...il.com>,
        Jonathan Hunter <jonathanh@...dia.com>,
        linux-kernel@...r.kernel.org, Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>,
        linux-tegra-owner@...r.kernel.org
Subject: Re: [PATCH 2/2] ARM: dts: tegra20/tegra30: add pmu interrupt-affinity

On 20.07.2018 18:34, Marcel Ziswiler wrote:
> From: Marcel Ziswiler <marcel.ziswiler@...adex.com>
> 
> This is similar to tegra124 and avoids the following being reported
> upon boot:
> 
> hw perfevents: no interrupt-affinity property for /pmu, guessing.
> 
> Signed-off-by: Marcel Ziswiler <marcel.ziswiler@...adex.com>

Reviewed-by: Stefan Agner <stefan@...er.ch>

> 
> ---
> 
>  arch/arm/boot/dts/tegra20.dtsi | 2 ++
>  arch/arm/boot/dts/tegra30.dtsi | 4 ++++
>  2 files changed, 6 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
> index a22c6a8f8f83..dcad6d6128cf 100644
> --- a/arch/arm/boot/dts/tegra20.dtsi
> +++ b/arch/arm/boot/dts/tegra20.dtsi
> @@ -867,5 +867,7 @@
>  		compatible = "arm,cortex-a9-pmu";
>  		interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
>  			     <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-affinity = <&{/cpus/cpu@0}>,
> +				     <&{/cpus/cpu@1}>;
>  	};
>  };
> diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
> index a6781f653310..1de10f0d1da7 100644
> --- a/arch/arm/boot/dts/tegra30.dtsi
> +++ b/arch/arm/boot/dts/tegra30.dtsi
> @@ -1013,5 +1013,9 @@
>  			     <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>,
>  			     <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>,
>  			     <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
> +		interrupt-affinity = <&{/cpus/cpu@0}>,
> +				     <&{/cpus/cpu@1}>,
> +				     <&{/cpus/cpu@2}>,
> +				     <&{/cpus/cpu@3}>;
>  	};
>  };

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ