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Message-Id: <6F48D384-B29C-41B4-83F1-B02FC2480205@amacapital.net>
Date: Fri, 27 Jul 2018 13:46:06 -0700
From: Andy Lutomirski <luto@...capital.net>
To: Jim Mattson <jmattson@...gle.com>
Cc: Andy Lutomirski <luto@...nel.org>, Kyle Huey <me@...ehuey.com>,
Robert O'Callahan <robert@...llahan.org>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
"H. Peter Anvin" <hpa@...or.com>, X86 ML <x86@...nel.org>,
Paolo Bonzini <pbonzini@...hat.com>,
Radim Krčmář <rkrcmar@...hat.com>,
Jeff Dike <jdike@...toit.com>,
Richard Weinberger <richard@....at>,
Alexander Viro <viro@...iv.linux.org.uk>,
Shuah Khan <shuah@...nel.org>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Borislav Petkov <bp@...e.de>,
Peter Zijlstra <peterz@...radead.org>,
Boris Ostrovsky <boris.ostrovsky@...cle.com>,
Len Brown <len.brown@...el.com>,
"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
Dmitry Safonov <dsafonov@...tuozzo.com>,
David Matlack <dmatlack@...gle.com>,
Nadav Amit <nadav.amit@...il.com>,
Andi Kleen <andi@...stfloor.org>,
LKML <linux-kernel@...r.kernel.org>,
user-mode-linux-devel@...ts.sourceforge.net,
"open list:USER-MODE LINUX (UML)"
<user-mode-linux-user@...ts.sourceforge.net>,
Linux FS Devel <linux-fsdevel@...r.kernel.org>,
"open list:KERNEL SELFTEST FRAMEWORK"
<linux-kselftest@...r.kernel.org>, kvm list <kvm@...r.kernel.org>
Subject: Re: [PATCH v14 8/9] KVM: x86: virtualize cpuid faulting
> On Jul 27, 2018, at 1:28 PM, Jim Mattson <jmattson@...gle.com> wrote:
>
>> On Fri, Jul 27, 2018 at 12:41 PM, Andy Lutomirski <luto@...nel.org> wrote:
>>> On Wed, Feb 8, 2017 at 12:09 AM, Kyle Huey <me@...ehuey.com> wrote:
>>> Hardware support for faulting on the cpuid instruction is not required to
>>> emulate it, because cpuid triggers a VM exit anyways. KVM handles the relevant
>>> MSRs (MSR_PLATFORM_INFO and MSR_MISC_FEATURES_ENABLE) and upon a
>>> cpuid-induced VM exit checks the cpuid faulting state and the CPL.
>>> kvm_require_cpl is even kind enough to inject the GP fault for us.
>>>
>>> Signed-off-by: Kyle Huey <khuey@...ehuey.com>
>>> Reviewed-by: David Matlack <dmatlack@...gle.com>
>>> ---
>>> ...
>>> @@ -7613,16 +7636,19 @@ void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
>>>
>>> kvm_clear_async_pf_completion_queue(vcpu);
>>> kvm_async_pf_hash_reset(vcpu);
>>> vcpu->arch.apf.halted = false;
>>>
>>> if (!init_event) {
>>> kvm_pmu_reset(vcpu);
>>> vcpu->arch.smbase = 0x30000;
>>> +
>>> + vcpu->arch.msr_platform_info = MSR_PLATFORM_INFO_CPUID_FAULT;
>>> + vcpu->arch.msr_misc_features_enables = 0;
>>
>> Jim, I assume you're worried about this bit? It seems like
>> msr_platform_info should maybe be initialized to zero to avoid causing
>> an unintended migration issue.
>
> Initializing this bit to zero helps with migration, but then if the
> CPUID faulting bits in both MSRs are set, userspace has to take pains
> to ensure that MSR_PLATFORM_INFO is restored first, or the
> MSR_MISC_FEATURES_ENABLES value will be rejected.
The code could drop the constraint and just let the entry possibly fail if the MSRs are set wrong
>
> I'm also concerned about the 0 in the "Maximum Non-Turbo Ratio" field
> feeding into someone's calculated TSC frequency.
Hmm. I don’t have a good answer to that. Are there any real CPUs that have this MSR but don’t have that field?
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