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Message-ID: <CALCETrUCiptFxdvAEZFo7A52eEmAEk12bJKTkX8jNLBA_391wg@mail.gmail.com>
Date: Fri, 27 Jul 2018 15:58:13 -0700
From: Andy Lutomirski <luto@...nel.org>
To: Jim Mattson <jmattson@...gle.com>
Cc: Andy Lutomirski <luto@...nel.org>, Kyle Huey <me@...ehuey.com>,
"Robert O'Callahan" <robert@...llahan.org>,
Thomas Gleixner <tglx@...utronix.de>,
Ingo Molnar <mingo@...hat.com>,
"H. Peter Anvin" <hpa@...or.com>, X86 ML <x86@...nel.org>,
Paolo Bonzini <pbonzini@...hat.com>,
Radim Krčmář <rkrcmar@...hat.com>,
Jeff Dike <jdike@...toit.com>,
Richard Weinberger <richard@....at>,
Alexander Viro <viro@...iv.linux.org.uk>,
Shuah Khan <shuah@...nel.org>,
Dave Hansen <dave.hansen@...ux.intel.com>,
Borislav Petkov <bp@...e.de>,
Peter Zijlstra <peterz@...radead.org>,
Boris Ostrovsky <boris.ostrovsky@...cle.com>,
Len Brown <len.brown@...el.com>,
"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
Dmitry Safonov <dsafonov@...tuozzo.com>,
David Matlack <dmatlack@...gle.com>,
Nadav Amit <nadav.amit@...il.com>,
Andi Kleen <andi@...stfloor.org>,
LKML <linux-kernel@...r.kernel.org>,
user-mode-linux-devel@...ts.sourceforge.net,
"open list:USER-MODE LINUX (UML)"
<user-mode-linux-user@...ts.sourceforge.net>,
Linux FS Devel <linux-fsdevel@...r.kernel.org>,
"open list:KERNEL SELFTEST FRAMEWORK"
<linux-kselftest@...r.kernel.org>, kvm list <kvm@...r.kernel.org>
Subject: Re: [PATCH v14 8/9] KVM: x86: virtualize cpuid faulting
On Fri, Jul 27, 2018 at 2:30 PM, Jim Mattson <jmattson@...gle.com> wrote:
> On Fri, Jul 27, 2018 at 2:05 PM, Andy Lutomirski <luto@...nel.org> wrote:
>> Does KVM *have* a concept of "maximum non-turbo frequency" of the
>> guest that it would make sense to expose here? If so, presumably the
>> right solution is to expose it.
>
> KVM has the concept of a guest's invariant TSC frequency. The Maximum
> Non-Turbo Ratio is just some fraction of that. Sadly, the fraction is
> 100 MHz, 133.33MHz, or the "scalable bus frequency" from some other
> MSR, depending on microarchitecture.
Which is problematic, unless KVM wants to start deciding what the base
clock is. There's MSR_FSB_FREQ, which is supported on Atom only,
IIRC.
I really wish Intel would get its act together.
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