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Message-ID: <BYAPR04MB4760BF8783C0E58A75D00F25E52A0@BYAPR04MB4760.namprd04.prod.outlook.com>
Date: Fri, 27 Jul 2018 06:49:59 +0000
From: "Ernest Zhang(WH)" <ernest.zhang@...hubtech.com>
To: Adrian Hunter <adrian.hunter@...el.com>,
Ulf Hansson <ulf.hansson@...aro.org>,
"linux-mmc@...r.kernel.org" <linux-mmc@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
CC: "Chuanjin Pang (WH)" <chuanjin.pang@...hubtech.com>,
"Mike Li (WH)" <mike.li@...hubtech.com>,
"Chevron Li (WH)" <chevron.li@...hubtech.com>,
"Shirley Her (SC)" <shirley.her@...hubtech.com>,
"Xiaoguang Yu (WH)" <xiaoguang.yu@...hubtech.com>,
"Bobby Wu (WH)" <bobby.wu@...hubtech.com>
Subject: RE: [PATCH V7 2/5] mmc: sdhci: Change O2 Host HS200 mode clock
frequency to 200MHz
Hi Adrian,
Do I need re-submit all 5 patches after fix that and change the version to v8?
BR
-----Original Message-----
From: Adrian Hunter [mailto:adrian.hunter@...el.com]
Sent: 2018年7月25日 15:45
To: Ernest Zhang(WH); Ulf Hansson; linux-mmc@...r.kernel.org; linux-kernel@...r.kernel.org
Cc: Chuanjin Pang (WH); Mike Li (WH); Chevron Li (WH); Shirley Her (SC); Xiaoguang Yu (WH); Bobby Wu (WH)
Subject: Re: [PATCH V7 2/5] mmc: sdhci: Change O2 Host HS200 mode clock frequency to 200MHz
On 16/07/18 09:26, ernest.zhang wrote:
> O2 SD Host HS200 mode clock frequency current is 208MHz, should be
> changed to 200MHz to meet specification.
>
> Signed-off-by: ernest.zhang <ernest.zhang@...hubtech.com>
You left in the misleading comment. Fix that and add:
Acked-by: Adrian Hunter <adrian.hunter@...el.com>
> ---
> Change in V7:
> Change HS200 mode clock frequency from 208MHz to 200MHz to meet
> Specification.
>
> Change in V1~V6:
> N/A
> ---
> drivers/mmc/host/sdhci-pci-o2micro.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mmc/host/sdhci-pci-o2micro.c
> b/drivers/mmc/host/sdhci-pci-o2micro.c
> index ba59db6a126c..94cf3cd75dd3 100644
> --- a/drivers/mmc/host/sdhci-pci-o2micro.c
> +++ b/drivers/mmc/host/sdhci-pci-o2micro.c
> @@ -311,7 +311,7 @@ int sdhci_pci_o2_probe(struct sdhci_pci_chip
> *chip)
>
> /* Check Whether subId is 0x11 or 0x12 */
> if ((scratch_32 == 0x11) || (scratch_32 == 0x12)) {
> - scratch_32 = 0x2c280000;
> + scratch_32 = 0x25100000;
>
> /* Set Base Clock to 208MZ */
That comment is misleading now.
> o2_pci_set_baseclk(chip, scratch_32); @@ -406,7 +406,7 @@ int
> sdhci_pci_o2_probe(struct sdhci_pci_chip *chip)
> O2_SD_PLL_SETTING, scratch_32);
> } else {
> scratch_32 &= 0x0000FFFF;
> - scratch_32 |= 0x2c280000;
> + scratch_32 |= 0x25100000;
>
> pci_write_config_dword(chip->pdev,
> O2_SD_PLL_SETTING, scratch_32);
>
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