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Message-ID: <871sbpm9w7.fsf@archiso.i-did-not-set--mail-host-address--so-tickle-me>
Date:   Fri, 27 Jul 2018 15:10:32 +0800
From:   djw@...hip.com.cn
To:     Ezequiel Garcia <ezequiel@...labora.com>
Cc:     djw@...hip.com.cn, linux-rockchip@...ts.infradead.org,
        Wayne Chou <zxf@...hip.com.cn>,
        Heiko Stuebner <heiko@...ech.de>,
        Arnd Bergmann <arnd@...db.de>,
        Rob Herring <robh+dt@...nel.org>,
        Shawn Lin <shawn.lin@...k-chips.com>,
        Catalin Marinas <catalin.marinas@....com>,
        Pierre-Hugues Husson <phh@....me>,
        Enric Balletbo i Serra <enric.balletbo@...labora.com>,
        Jacob Chen <jacob-chen@...wrt.com>,
        Brian Norris <briannorris@...omium.org>,
        Will Deacon <will.deacon@....com>, devicetree@...r.kernel.org,
        Jagan Teki <jagan@...rulasolutions.com>,
        linux-arm-kernel@...ts.infradead.org,
        Jianqun Xu <jay.xu@...k-chips.com>,
        Masahiro Yamada <yamada.masahiro@...ionext.com>,
        Klaus Goger <klaus.goger@...obroma-systems.com>,
        linux-kernel@...r.kernel.org,
        Heinrich Schuchardt <xypron.glpk@....de>,
        Mark Rutland <mark.rutland@....com>
Subject: Re: [PATCH v1] arm64: dts: rockchip: add support for ROC-RK3399-PC board

Ezequiel Garcia <ezequiel@...labora.com> writes:

> On Thu, 2018-07-26 at 15:13 +0800, djw@...hip.com.cn wrote:
>> From: Levin Du <djw@...hip.com.cn>
>> 
>> ROC-RK3399-PC is a power efficient 4GB LPDDR4 single board
>> computer with USB 3.0 and Gigabit Ethernet in a form factor
>> compatible with the Raspberry Pi. It is based on the Rockchip
>> RK3399 SoC, powered by the Type-C port.
>> 
>> The devicetree currently supports peripherals of:
>> 
>> - Ethernet
>> - HDMI
>> - SD Card
>> - UART2 debug
>> - TYPE-C
>
> Hi Levin,
>
> Last time I tried to make the mainline fusb driver work, it really didn't.
> Is USB 3.0 Type-C actually working with mainline on this board?
>
> Thanks!
> Eze

That's what I added in the end:

  USB3 in type-c port currently only works with normal orientation,
  not flip one.

Adding 'extcon=<&fusb0>' to make the dwc3 core failed to initialize.

Regards,
Levin

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