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Message-ID: <20180727144405.GB29626@lst.de>
Date: Fri, 27 Jul 2018 16:44:05 +0200
From: Christoph Hellwig <hch@....de>
To: Atish Patra <atish.patra@....com>
Cc: Christoph Hellwig <hch@....de>,
"tglx@...utronix.de" <tglx@...utronix.de>,
"palmer@...ive.com" <palmer@...ive.com>,
"jason@...edaemon.net" <jason@...edaemon.net>,
"marc.zyngier@....com" <marc.zyngier@....com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"mark.rutland@....com" <mark.rutland@....com>,
"anup@...infault.org" <anup@...infault.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"aou@...s.berkeley.edu" <aou@...s.berkeley.edu>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
"shorne@...il.com" <shorne@...il.com>
Subject: Re: RFC: simplified RISC-V interrupt and clocksource handling
On Thu, Jul 26, 2018 at 04:38:43PM -0700, Atish Patra wrote:
> 1. As per my understanding, timer interrupt now can't be registered as a
> Linux IRQ now. Thus, /proc/interrupts will not be automatically populated
> for timer interrupt stats. Am I wrong in my assumption?
Yes, with this code the timer interrupt does not show up in
/proc/interrupts. I wonder if that is an issue and if there is any
precedence for it?
> 2. The future version of local interrupt controller known as Core Level
> Interrupt Controller aka CLIC. Do we have to change the current design
> again for CLIC in future?
>
> Here are the docs:
> https://github.com/sifive/clic-spec/blob/master/clic.adoc
This doesn't really look like 'the future' version but a proposal for
something more like low end realtime microcontrollers ala ARM Cortex M*.
At least the priorities don't really make much sense for a general
purpose SOC.
Either way the existing architectural scause/sie interrupt handling will
remain but can be opted out, but if we really want to support the CLIC
it would have to grow a new irqchip driver, and the PLIC driver would
require a few dozend new lines of glue code to chain underneath it.
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