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Message-Id: <1532837696-11505-1-git-send-email-oceanhe@zoho.com.cn>
Date:   Sun, 29 Jul 2018 00:14:56 -0400
From:   oceanhe@...o.com.cn
To:     srinivas.pandruvada@...ux.intel.com, lenb@...nel.org
Cc:     rjw@...ysocki.net, viresh.kumar@...aro.org,
        linux-pm@...r.kernel.org, linux-kernel@...r.kernel.org,
        Ocean He <hehy1@...ovo.com>
Subject: [PATCH] cpufreq: intel_pstate: warn if HWP Native mode and OOB mode are both set

From: Ocean He <hehy1@...ovo.com>

Refer to Intel HWPM Compliance Guide (Document Number: 566474): Bit[6] or
bit[8] of MSR MISC_PWR_MGMT is set only when BIOS select either HWP Native
mode or HWP OOB mode. Bit[6] and bit[8] cannot be set both at the same
time.

Add a warning message if intel_pstate detects both HWP Native mode and
HWP OOB mode are set at the same time.

Signed-off-by: Ocean He <hehy1@...ovo.com>
---
 drivers/cpufreq/intel_pstate.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/cpufreq/intel_pstate.c b/drivers/cpufreq/intel_pstate.c
index 3c39712..678d3f2 100644
--- a/drivers/cpufreq/intel_pstate.c
+++ b/drivers/cpufreq/intel_pstate.c
@@ -2455,8 +2455,12 @@ static bool __init intel_pstate_platform_pwr_mgmt_exists(void)
 	id = x86_match_cpu(intel_pstate_cpu_oob_ids);
 	if (id) {
 		rdmsrl(MSR_MISC_PWR_MGMT, misc_pwr);
-		if ( misc_pwr & (1 << 8))
+		if (misc_pwr & (1 << 8)) {
+			if (misc_pwr & (1 << 6))
+				pr_warn(FW_WARN
+					"HWP Native mode and OOB mode cannot be set both at the same time.\n");
 			return true;
+		}
 	}
 
 	idx = acpi_match_platform_list(plat_info);
-- 
1.8.3.1


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