linux-kernel - Re: [PATCH 2/4] ASoC: tegra: Add a TDM configuration callback

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Message-ID: <20180730101800.GF5789@sirena.org.uk>
Date:   Mon, 30 Jul 2018 11:18:00 +0100
From:   Mark Brown <broonie@...nel.org>
To:     Jon Hunter <jonathanh@...dia.com>
Cc:     Jorge Sanjuan <jorge.sanjuan@...ethink.co.uk>, lgirdwood@...il.com,
        thierry.reding@...il.com, alsa-devel@...a-project.org,
        linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-kernel@...ts.codethink.co.uk
Subject: Re: [PATCH 2/4] ASoC: tegra: Add a TDM configuration callback

On Mon, Jul 30, 2018 at 10:31:16AM +0100, Jon Hunter wrote:

> It can be quite common for the fsync-width for DSP modes to be a single clock and so 
> I am not sure that is makes sense to set this here always to the slot width. It maybe
> worth considering add a DT property for specifying the fsync width.

DSP modes only care about the rising edge of the LRCLK, the pulse can be
any width without causing interoperability problems.

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