linux-kernel - [tip:x86/timers] x86/tsc: Consolidate init code

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Date:   Mon, 30 Jul 2018 10:37:55 -0700
From:   tip-bot for Dou Liyang <tipbot@...or.com>
To:     linux-tip-commits@...r.kernel.org
Cc:     tglx@...utronix.de, peterz@...radead.org, hpa@...or.com,
        mingo@...nel.org, pasha.tatashin@...cle.com,
        linux-kernel@...r.kernel.org, douly.fnst@...fujitsu.com
Subject: [tip:x86/timers] x86/tsc: Consolidate init code

Commit-ID:  608008a45798fe9e2aee04f99b5270ea57c1376f
Gitweb:     https://git.kernel.org/tip/608008a45798fe9e2aee04f99b5270ea57c1376f
Author:     Dou Liyang <douly.fnst@...fujitsu.com>
AuthorDate: Mon, 30 Jul 2018 15:54:20 +0800
Committer:  Thomas Gleixner <tglx@...utronix.de>
CommitDate: Mon, 30 Jul 2018 19:33:35 +0200

x86/tsc: Consolidate init code

Split out suplicated code from tsc_early_init() and tsc_init() into a
common helper and fixup some comment typos.

[ tglx: Massaged changelog and renamed function ]

Signed-off-by: Dou Liyang <douly.fnst@...fujitsu.com>
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
Reviewed-by: Pavel Tatashin <pasha.tatashin@...cle.com>
Cc: <hpa@...or.com>
Cc: Peter Zijlstra <peterz@...radead.org>
Cc: "H. Peter Anvin" <hpa@...or.com>
Link: https://lkml.kernel.org/r/20180730075421.22830-2-douly.fnst@cn.fujitsu.com

---
 arch/x86/kernel/tsc.c | 22 ++++++++++++----------
 1 file changed, 12 insertions(+), 10 deletions(-)

diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c
index 02e416b87ac1..1463468ba9a0 100644
--- a/arch/x86/kernel/tsc.c
+++ b/arch/x86/kernel/tsc.c
@@ -182,7 +182,7 @@ static void __init cyc2ns_init_boot_cpu(void)
 }
 
 /*
- * Secondary CPUs do not run through cyc2ns_init(), so set up
+ * Secondary CPUs do not run through tsc_init(), so set up
  * all the scale factors for all CPUs, assuming the same
  * speed as the bootup CPU. (cpufreq notifiers will fix this
  * up if their speed diverges)
@@ -1389,7 +1389,7 @@ static bool __init determine_cpu_tsc_frequencies(bool early)
 	}
 
 	/*
-	 * Trust non-zero tsc_khz as authorative,
+	 * Trust non-zero tsc_khz as authoritative,
 	 * and use it to sanity check cpu_khz,
 	 * which will be off if system timer is off.
 	 */
@@ -1421,6 +1421,14 @@ static unsigned long __init get_loops_per_jiffy(void)
 	return lpj;
 }
 
+static void __init tsc_enable_sched_clock(void)
+{
+	/* Sanitize TSC ADJUST before cyc2ns gets initialized */
+	tsc_store_and_check_tsc_adjust(true);
+	cyc2ns_init_boot_cpu();
+	static_branch_enable(&__use_tsc);
+}
+
 void __init tsc_early_init(void)
 {
 	if (!boot_cpu_has(X86_FEATURE_TSC))
@@ -1429,10 +1437,7 @@ void __init tsc_early_init(void)
 		return;
 	loops_per_jiffy = get_loops_per_jiffy();
 
-	/* Sanitize TSC ADJUST before cyc2ns gets initialized */
-	tsc_store_and_check_tsc_adjust(true);
-	cyc2ns_init_boot_cpu();
-	static_branch_enable(&__use_tsc);
+	tsc_enable_sched_clock();
 }
 
 void __init tsc_init(void)
@@ -1456,13 +1461,10 @@ void __init tsc_init(void)
 			setup_clear_cpu_cap(X86_FEATURE_TSC_DEADLINE_TIMER);
 			return;
 		}
-		/* Sanitize TSC ADJUST before cyc2ns gets initialized */
-		tsc_store_and_check_tsc_adjust(true);
-		cyc2ns_init_boot_cpu();
+		tsc_enable_sched_clock();
 	}
 
 	cyc2ns_init_secondary_cpus();
-	static_branch_enable(&__use_tsc);
 
 	if (!no_sched_irq_time)
 		enable_sched_clock_irqtime();