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Message-ID: <20180730231506.GA8608@rob-hp-laptop>
Date: Mon, 30 Jul 2018 17:15:06 -0600
From: Rob Herring <robh@...nel.org>
To: Emmanuel Vadot <manu@...ebsd.org>
Cc: srinivas.kandagatla@...aro.org, mark.rutland@....com,
maxime.ripard@...tlin.com, wens@...e.org, catalin.marinas@....com,
will.deacon@....com, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 3/4] nvmem: sunxi-sid: add support for H5's SID
controller
On Fri, Jul 27, 2018 at 01:52:04PM +0200, Emmanuel Vadot wrote:
> The H5 SoC have a SID controller that looks like the one in A64, the
> cells are in the same offset but doesn't contain the same data (thermal
> sensor calibration for example).
> Add a binding for it.
>
> Signed-off-by: Emmanuel Vadot <manu@...ebsd.org>
> ---
> Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt | 1 +
> 1 file changed, 1 insertion(+)
Acked-by: Rob Herring <robh@...nel.org>
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