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Message-ID: <20180731064333.fkkbgnat3gdn3fhs@qschulz>
Date: Tue, 31 Jul 2018 08:43:33 +0200
From: Quentin Schulz <quentin.schulz@...tlin.com>
To: Florian Fainelli <f.fainelli@...il.com>
Cc: andrew@...n.ch, davem@...emloft.net, netdev@...r.kernel.org,
alexandre.belloni@...tlin.com, linux-kernel@...r.kernel.org,
thomas.petazzoni@...tlin.com
Subject: Re: [PATCH net-next] net: phy: mscc: the extended page access
register is 16 bits
Hi Florian,
On Mon, Jul 30, 2018 at 09:53:31AM -0700, Florian Fainelli wrote:
> On 07/30/2018 05:53 AM, Quentin Schulz wrote:
> > The Extended Page Access is a 16-bit register, so change the page
> > parameter of vsc85xx_phy_page_set to a u16.
> >
> > Signed-off-by: Quentin Schulz <quentin.schulz@...tlin.com>
>
> Since you targeted net-next for this patch, I am assuming this is not
> yet a problem, but would soon be one with the changes you plan on
> introducing?
>
Yes indeed. When I get the quad-port PHY things to go as planned, then
I'll need sometimes to change to a page that is above the size of a u16.
For now, all the pages are accessed with a number that is lower than the
size of a u16, so it isn't a problem.
Quentin
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