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Message-Id: <1533108552-19878-2-git-send-email-hayashibara.keiji@socionext.com>
Date: Wed, 1 Aug 2018 16:29:11 +0900
From: Keiji Hayashibara <hayashibara.keiji@...ionext.com>
To: broonie@...nel.org, robh+dt@...nel.org, mark.rutland@....com,
yamada.masahiro@...ionext.com, linux-spi@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, devicetree@...r.kernel.org
Cc: masami.hiramatsu@...aro.org, jaswinder.singh@...aro.org,
linux-kernel@...r.kernel.org, hayashibara.keiji@...ionext.com,
Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
Subject: [PATCH v3 1/2] dt-bindings: spi: add DT bindings for UniPhier SPI controller
From: Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
Add DT bindings for SPI controller implemented in UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
Signed-off-by: Keiji Hayashibara <hayashibara.keiji@...ionext.com>
Reviewed-by: Rob Herring <robh@...nel.org>
---
.../devicetree/bindings/spi/spi-uniphier.txt | 22 ++++++++++++++++++++++
1 file changed, 22 insertions(+)
create mode 100644 Documentation/devicetree/bindings/spi/spi-uniphier.txt
diff --git a/Documentation/devicetree/bindings/spi/spi-uniphier.txt b/Documentation/devicetree/bindings/spi/spi-uniphier.txt
new file mode 100644
index 0000000..504a4ec
--- /dev/null
+++ b/Documentation/devicetree/bindings/spi/spi-uniphier.txt
@@ -0,0 +1,22 @@
+Socionext UniPhier SPI controller driver
+
+UniPhier SoCs have SCSSI which supports SPI single channel.
+
+Required properties:
+ - compatible: should be "socionext,uniphier-scssi"
+ - reg: address and length of the spi master registers
+ - #address-cells: must be <1>, see spi-bus.txt
+ - #size-cells: must be <0>, see spi-bus.txt
+ - clocks: A phandle to the clock for the device.
+ - resets: A phandle to the reset control for the device.
+
+Example:
+
+spi0: spi@...06000 {
+ compatible = "socionext,uniphier-scssi";
+ reg = <0x54006000 0x100>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ clocks = <&peri_clk 11>;
+ resets = <&peri_rst 11>;
+};
--
2.7.4
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