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Message-Id: <20180801104941.29432-4-john@phrozen.org>
Date: Wed, 1 Aug 2018 12:49:41 +0200
From: John Crispin <john@...ozen.org>
To: Alban Bedel <albeu@...e.fr>,
Kate Stewart <kstewart@...uxfoundation.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc: linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org,
John Crispin <john@...ozen.org>
Subject: [PATCH V2 3/3] qcom: ipq4019: add USB devicetree nodes
This patch makes USB work on the Dakota EVB.
Signed-off-by: John Crispin <john@...ozen.org>
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 20 +++++++
arch/arm/boot/dts/qcom-ipq4019.dtsi | 76 +++++++++++++++++++++++++++
2 files changed, 96 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
index 418f9a022336..0c226de1c672 100644
--- a/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi
@@ -109,5 +109,25 @@
wifi@...0000 {
status = "ok";
};
+
+ usb3_ss_phy: usb-phy@...00 {
+ status = "ok";
+ };
+
+ usb3_hs_phy: usb-phy@...00 {
+ status = "ok";
+ };
+
+ usb3: usb3@...8800 {
+ status = "ok";
+ };
+
+ usb2_hs_phy: usb-phy@...00 {
+ status = "ok";
+ };
+
+ usb2: usb2@...8800 {
+ status = "ok";
+ };
};
};
diff --git a/arch/arm/boot/dts/qcom-ipq4019.dtsi b/arch/arm/boot/dts/qcom-ipq4019.dtsi
index 4620beafa84d..2ef20749b446 100644
--- a/arch/arm/boot/dts/qcom-ipq4019.dtsi
+++ b/arch/arm/boot/dts/qcom-ipq4019.dtsi
@@ -553,5 +553,81 @@
"legacy";
status = "disabled";
};
+
+ usb3_ss_phy: usb-phy@...00 {
+ compatible = "qcom,ipq4019-usb-ss-phy";
+ #phy-cells = <0>;
+ reg = <0x9a000 0x800>;
+ reg-names = "phy_base";
+ resets = <&gcc USB3_UNIPHY_PHY_ARES>;
+ reset-names = "por";
+ status = "disabled";
+ };
+
+ usb3_hs_phy: usb-phy@...00 {
+ compatible = "qcom,ipq4019-usb-hs-phy";
+ #phy-cells = <0>;
+ reg = <0xa6000 0x40>;
+ reg-names = "phy_base";
+ resets = <&gcc USB3_HSPHY_POR_ARES>,
+ <&gcc USB3_HSPHY_S_ARES>;
+ reset-names = "por", "srif";
+ status = "disabled";
+ };
+
+ usb3@...8800 {
+ compatible = "qcom,dwc3";
+ reg = <0x8af8800 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&gcc GCC_USB3_MASTER_CLK>,
+ <&gcc GCC_USB3_SLEEP_CLK>,
+ <&gcc GCC_USB3_MOCK_UTMI_CLK>;
+ clock-names = "master", "sleep", "mock_utmi";
+ ranges;
+ status = "disabled";
+
+ dwc3@...0000 {
+ compatible = "snps,dwc3";
+ reg = <0x8a00000 0xf8000>;
+ interrupts = <0 132 0>;
+ phys = <&usb3_hs_phy>, <&usb3_ss_phy>;
+ phy-names = "usb2-phy", "usb3-phy";
+ dr_mode = "host";
+ };
+ };
+
+ usb2_hs_phy: usb-phy@...00 {
+ compatible = "qcom,ipq4019-usb-hs-phy";
+ #phy-cells = <0>;
+ reg = <0xa8000 0x40>;
+ reg-names = "phy_base";
+ resets = <&gcc USB2_HSPHY_POR_ARES>,
+ <&gcc USB2_HSPHY_S_ARES>;
+ reset-names = "por", "srif";
+ status = "disabled";
+ };
+
+ usb2@...8800 {
+ compatible = "qcom,dwc3";
+ reg = <0x60f8800 0x100>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ clocks = <&gcc GCC_USB2_MASTER_CLK>,
+ <&gcc GCC_USB2_SLEEP_CLK>,
+ <&gcc GCC_USB2_MOCK_UTMI_CLK>;
+ clock-names = "master", "sleep", "mock_utmi";
+ ranges;
+ status = "disabled";
+
+ dwc3@...0000 {
+ compatible = "snps,dwc3";
+ reg = <0x6000000 0xf8000>;
+ interrupts = <0 136 0>;
+ phys = <&usb2_hs_phy>;
+ phy-names = "usb2-phy";
+ dr_mode = "host";
+ };
+ };
};
};
--
2.11.0
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