Message-ID: <86wot9wb9u.wl-marc.zyngier@arm.com>
Date:   Thu, 02 Aug 2018 07:08:45 +0100
From:   Marc Zyngier <marc.zyngier@....com>
To:     Lina Iyer <ilina@...eaurora.org>
Cc:     swboyd@...omium.org, evgreen@...omium.org,
        linus.walleij@...aro.org, bjorn.andersson@...aro.org,
        rplsssn@...eaurora.org, linux-kernel@...r.kernel.org,
        linux-arm-msm@...r.kernel.org, rnayak@...eaurora.org,
        devicetree@...r.kernel.org
Subject: Re: [PATCH RESEND RFC 1/4] drivers: pinctrl: qcom: add wakeup capability to GPIO

Hi Lina,

On Wed, 01 Aug 2018 20:45:38 +0100,
Lina Iyer <ilina@...eaurora.org> wrote:
> 
> Thanks for the feedback, Marc.
> 
> On Wed, Aug 01 2018 at 00:31 -0600, Marc Zyngier wrote:
> > On Wed, 01 Aug 2018 03:00:18 +0100,
> > Lina Iyer <ilina@...eaurora.org> wrote:
> >> 
> >> +static irqreturn_t wake_irq_gpio_handler(int irq, void *data)
> >> +{
> >> +	struct irq_data *irqd = data;
> >> +	struct irq_desc *desc = irq_data_to_desc(irqd);
> >> +	struct irq_chip *chip = irq_desc_get_chip(desc);
> >> +	struct gpio_chip *gc = irq_data_get_irq_chip_data(irqd);
> >> +	int irq_pin = irq_find_mapping(gc->irq.domain, irqd->hwirq);
> >> +
> >> +	chained_irq_enter(chip, desc);
> >> +	generic_handle_irq(irq_pin);
> >> +	chained_irq_exit(chip, desc);
> > 
> > That's crazy. I'm not even commenting on the irq handler vs chained
> > irqchip thing, but directly calling into a completely different part
> > of the irq hierarchy makes me feel nauseous,
> > 
> I know the sentiment; I am not too happy about it myself. Explanation
> below.
> 
> > Why isn't the interrupt still pending at the pinctrl level? Looking at
> > the diagram in the cover letter, I'd have hoped that the signal routed
> > to the PDC would wakeup the GIC, but that by virtue of being *also*
> > wired to the TLMM, the interrupt would be handled via the normal path.
> > 
> The short answer: TLMM is not active to sense a wakeup interrupt.

I get that bit. See below for the bit I don't get.

> When we enter system sleep mode, the TLMM and the GIC are powered off
> and the PDC is the only powered-on interrupt controller. The IRQs
> configured at the PDC are the only ones capable of waking the system.
> Upon sensing the interrupt, the PDC intiates a system wakeup and replays
> the interrupt to the GIC. The GIC relays that to AP. Unfortunately, the
> interrupts from the GPIO do not trigger the TLMM summary line. Therefore
> this handler needs to figure out what GPIO caused the wakeup and notify
> the corresponding driver.

That's most bizarre. What causes the TLMM output line not to reflect
the fact that an input is asserted? I understand that it has been
turned off, but surely the PDC wakes it up at the same time as the
GIC, and it should realise that there is something pending...

> 
> > Why isn't that the case? And if that's because the HW is broken and
> > doesn't buffer edge interrupts, why can't you use the resend mechanism
> > instead?
> > 
> The PDC hardware can replay the interrupts accurately. However, it will
> replay only the pin and its not the TLMM summary IRQ. The handler here,
> needs to notify the driver that the wakeup interrupt happened and needs
> to take action. If I could trip the summary IRQ in this handler that
> would work too. Can it be done?

So the TLMM has indeed noticed the interrupt and you can read the TLMM
status registers to find out what fired? The question remains: why
isn't it generating any output if it knows something as fired? The
output line is level, right? What you describe would make sense if it
was generating an edge, but that'd really be a terrible design...

As for tripping the summary interrupt, see check_irq_resend(). This
will only work if this summary interrupt is edge.

Thanks,

	M.

-- 
Jazz is not dead, it just smell funny.

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