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Message-ID: <41a996bf-b591-db0c-718e-524743f348fd@wdc.com>
Date: Wed, 1 Aug 2018 18:02:52 -0700
From: Atish Patra <atish.patra@....com>
To: Christoph Hellwig <hch@....de>
Cc: "tglx@...utronix.de" <tglx@...utronix.de>,
"palmer@...ive.com" <palmer@...ive.com>,
"jason@...edaemon.net" <jason@...edaemon.net>,
"marc.zyngier@....com" <marc.zyngier@....com>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"mark.rutland@....com" <mark.rutland@....com>,
"anup@...infault.org" <anup@...infault.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"aou@...s.berkeley.edu" <aou@...s.berkeley.edu>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-riscv@...ts.infradead.org" <linux-riscv@...ts.infradead.org>,
"shorne@...il.com" <shorne@...il.com>
Subject: Re: [PATCH 7/9] irqchip: add a RISC-V PLIC driver
On 8/1/18 7:14 AM, Christoph Hellwig wrote:
> I've pushed out an update to the riscv-irq-simple.2 branch to better
> handle with sparse contexid maps, please retry with that.
>
I see you have changed the driver file name from irq-riscv-plic to
irq-riscv-sifive along with default Y for SIFIVE_PLIC. I guess it was
done because PLIC register spec is SIFIVE specific rather than RISC-V.
But can we keep the new kconfig option "SIFIVE_PLIC" enabled in
driver/irqchip/Kconfig or arch/riscv/Kconfig for now to avoid breakage
without linux_defconfig update.
With the config enabled, Qemu virt machine booting has no issues with
riscv-irq-simple.2 branch. I am still looking at the crash from the
hardware.
Regards,
Atish
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