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Message-ID: <76f4442e-842b-c08f-386d-a7062ed34a19@nvidia.com>
Date: Thu, 2 Aug 2018 13:21:20 +0100
From: Jon Hunter <jonathanh@...dia.com>
To: Venkat Reddy Talla <vreddytalla@...dia.com>, <airlied@...ux.ie>,
<dri-devel@...ts.freedesktop.org>, <pdeschrijver@...dia.com>,
<vivek.gautam@...eaurora.org>, <p.zabel@...gutronix.de>,
<thierry.reding@...il.com>, <mperttunen@...dia.com>,
<mark.rutland@....com>, <robh+dt@...nel.org>,
<devicetree@...r.kernel.org>, <linux-tegra@...r.kernel.org>,
<linux-kernel@...r.kernel.org>
CC: <avienamo@...dia.com>, <talho@...dia.com>, <ldewangan@...dia.com>
Subject: Re: [PATCH 1/3] soc/tegra: pmc: set IO pad power state and voltage
via pinctrl fw
On 02/08/18 12:59, Venkat Reddy Talla wrote:
> The IO pins of Tegra SoCs are grouped for common control
> of IO interface like setting voltage signal levels and
> power state of the interface. These groups are referred
> to as IO pads.The power state and voltage control of IO pins
> can be done at IO pads level.
>
> Tegra SoCs support powering down IO pads when they are
> not used even in the active state of system.
> This saves power from that IO interface. Also it supports
> multiple voltage level in IO pins for interfacing on
> some of pads. The IO pad voltage is automatically detected
> till Tegra124, hence SW need not to configure this.
> But from Tegra210, the automatic detection logic has been
> removed, hence SW need to explicitly set the IO pad
> voltage into IO pad configuration registers.
>
> Add support to configure the power state and voltage level
> of the IO pads from client driver via pincontrol framework.
>
> Signed-off-by: Venkat Reddy Talla <vreddytalla@...dia.com>
This appears to be a duplicate effort of the following which we have
been reviewing ...
https://marc.info/?l=linux-tegra&m=153295930808915&w=2
Cheers
Jon
--
nvpublic
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