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Date:   Fri, 03 Aug 2018 15:24:03 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Evan Green <evgreen@...gle.com>, skannan@...eaurora.org
Cc:     tdas@...eaurora.org, rjw@...ysocki.net,
        Viresh Kumar <viresh.kumar@...aro.org>,
        linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
        Rajendra Nayak <rnayak@...eaurora.org>,
        anischal@...eaurora.org, devicetree@...r.kernel.org,
        robh@...nel.org, amit.kucheria@...aro.org
Subject: Re: [PATCH v7 2/2] cpufreq: qcom-hw: Add support for QCOM cpufreq HW driver

Quoting skannan@...eaurora.org (2018-08-03 12:52:48)
> On 2018-08-03 12:40, Evan Green wrote:
> > Hi Taniya,
> > 
> > On Tue, Jul 24, 2018 at 3:44 AM Taniya Das <tdas@...eaurora.org> wrote:
> >> 
> >> +               if (src)
> >> +                       c->table[i].frequency = c->xo_rate * lval / 
> >> 1000;
> >> +               else
> >> +                       c->table[i].frequency = INIT_RATE / 1000;
> > 
> > I don't know much about how this hardware works, but based on the
> > mask, src has 4 possible values. So does 0 mean INIT_RATE, and 1, 2,
> > and 3 all mean xo_rate?
> > 
> > Also, is INIT_RATE really constant? It sounds like gpll0 (or
> > gpll0_out_even?). You're already getting the xo clock, why not get
> > gpll0's real rate as well?
> 
> Actually I was about to comment and say NOT to get clocks just to get 
> their rate. The XO_RATE is just a multiplication factor. This HW/FW can 
> change in the future and make the multiplication factor to 1KHz.

So future changes to this hardware are going to make this register
return the final frequency that we should use? Sounds great! But that
isn't how it's working right now. We need to have XO in the binding here
so the driver can work with different XO frequencies in case that ever
happens. Same story for GPLL0. Hardcoding this stuff in the driver just
means we'll have to swizzle things in the driver when it changes.

> We also 
> can't really control any of the clocks going to this block from Linux 
> (it's all locked down).

This shouldn't matter. The clocks going to this hardware block are
described by the firmware to the OS by means of the DT node. If the
firmware or the hardware decides to change the input clks then the
binding can have different clk nodes used.

> Adding clk_get significantly delays when this 
> driver can be probed and increases boot up time.

Huh? Please fix your bootloader to increase the CPU frequency before
booting the kernel. I really doubt probe defer is going to happen if we
send GPLL0 here (XO is a DT clk so it's definitely registered before
this driver), and trying to work around probe defer because the CPU
won't go fast before that is papering over a larger problem with both
probe defer and bootloaders not supplying enough CPU speed for you.

> The INIT_RATE will 
> always be 300 MHz independent of what source it's coming from (as in, if 
> GPLL0 can't give 300, the HW design will be so that we'll find a 
> different source).
> 
> So, I'd like to remove any clock bindings for this driver.

No. Bindings describe how the hardware is connected. Please don't remove
clocks from the binding just because probe defer is a concern.

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