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Message-ID: <1533650404-18125-6-git-send-email-avienamo@nvidia.com>
Date: Tue, 7 Aug 2018 17:00:01 +0300
From: Aapo Vienamo <avienamo@...dia.com>
To: Ulf Hansson <ulf.hansson@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Thierry Reding <thierry.reding@...il.com>,
Jonathan Hunter <jonathanh@...dia.com>,
"Adrian Hunter" <adrian.hunter@...el.com>,
Mikko Perttunen <mperttunen@...dia.com>
CC: <linux-mmc@...r.kernel.org>, <devicetree@...r.kernel.org>,
<linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Aapo Vienamo <avienamo@...dia.com>
Subject: [PATCH 5/8] arm64: dts: tegra186: Add SDMMC4 DQS trim value
Add the HS400 DQS trim value for Tegra186 SDMMC4.
Signed-off-by: Aapo Vienamo <avienamo@...dia.com>
---
arch/arm64/boot/dts/nvidia/tegra186.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/nvidia/tegra186.dtsi b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
index 6e9ef26..9e07bc6 100644
--- a/arch/arm64/boot/dts/nvidia/tegra186.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra186.dtsi
@@ -313,6 +313,7 @@
nvidia,pad-autocal-pull-down-offset-1v8-timeout = <0x0a>;
nvidia,default-tap = <0x5>;
nvidia,default-trim = <0x9>;
+ nvidia,dqs-trim = <63>;
status = "disabled";
};
--
2.7.4
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