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Date:   Sat, 11 Aug 2018 00:48:19 +0800
From:   Chen-Yu Tsai <wens@...e.org>
To:     Icenowy Zheng <icenowy@...c.io>
Cc:     Maxime Ripard <maxime.ripard@...tlin.com>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        linux-clk <linux-clk@...r.kernel.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        linux-sunxi <linux-sunxi@...glegroups.com>,
        Rongyi Chen <chenyi@...cool.com>
Subject: Re: [PATCH] clk: sunxi-ng: h6: fix PWM gate/reset offset

On Fri, Aug 10, 2018 at 11:16 PM, Icenowy Zheng <icenowy@...c.io> wrote:
> From: Rongyi Chen <chenyi@...cool.com>
>
> Currently the register offset of the PWM bus gate in Allwinner H6 clock
> driver is wrong.
>
> Fix this issue.
>
> Fixes: 542353ea ("clk: sunxi-ng: add support for the Allwinner H6 CCU")
> Signed-off-by: Rongyi Chen <chenyi@...cool.com>
> [Icenowy: refactor commit message]
> Signed-off-by: Icenowy Zheng <icenowy@...c.io>

Queued up for 4.20. Thanks

ChenYu

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