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Message-ID: <CA+ZOyajyOfjZh8tQB4reAka3s+tqXachY4hiAtpA4Bb67x58AQ@mail.gmail.com>
Date: Fri, 10 Aug 2018 08:37:39 +0800
From: Zong Li <zongbox@...il.com>
To: Palmer Dabbelt <palmer@...ive.com>, aou@...s.berkeley.edu,
hch@...radead.org, linux-riscv@...ts.infradead.org,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
Zong Li <zong@...estech.com>, greentime@...estech.com
Subject: Re: FW: [PATCH v2] RISC-V: Add the directive for alignment of stvec's value
> Subject: [PATCH v2] RISC-V: Add the directive for alignment of stvec's value
>
> The stvec's value must be 4 byte alignment by specification definition.
> These directives avoid to stvec be set the non-alignment value.
>
> Signed-off-by: Zong Li <zong@...estech.com>
> ---
> arch/riscv/kernel/head.S | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index 3b6293f..11066d5 100644
> --- a/arch/riscv/kernel/head.S
> +++ b/arch/riscv/kernel/head.S
> @@ -94,6 +94,7 @@ relocate:
> or a0, a0, a1
> sfence.vma
> csrw sptbr, a0
> +.align 2
> 1:
> /* Set trap vector to spin forever to help debug */
> la a0, .Lsecondary_park
> @@ -143,6 +144,7 @@ relocate:
> tail smp_callin
> #endif
>
> +.align 2
> .Lsecondary_park:
> /* We lack SMP support or have too many harts, so park this hart */
> wfi
ping
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