lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <CA+Kvs9nSyB0t8DKnf3AQrke5rh1N7O8E8mFKOkOOoHCYbHC+=A@mail.gmail.com>
Date:   Tue, 14 Aug 2018 14:06:09 +0100
From:   Ramon Fried <ramon.fried@...il.com>
To:     kishon@...com
Cc:     lorenzo.pieralisi@....com, bhelgaas@...gle.com,
        linux-pci@...r.kernel.org, open list <linux-kernel@...r.kernel.org>
Subject: Re: PCI Endpoint - Missing inbound mapping ops ?

On Tue, Aug 14, 2018 at 2:04 PM Kishon Vijay Abraham I <kishon@...com> wrote:
>
> Hi,
>
> On Tuesday 14 August 2018 06:25 PM, Ramon Fried wrote:
> > On Tue, Aug 14, 2018 at 1:53 PM Kishon Vijay Abraham I <kishon@...com> wrote:
> >>
> >> Hi,
> >>
> >> On Tuesday 14 August 2018 06:19 PM, Ramon Fried wrote:
> >>> Hi.
> >>> I recently saw that the PCI endpoint API only supports outbound memory
> >>> mapping: (AXI -> PCI) through the map_addr op.
> >>> Why inbound mapping is missing (PCI->AXI) is missing ?
> >>> In almost all of the PCI EP controllers I've worked with there was a
> >>> need to map complete BARS or part of BARS to mmio/aperature regions on
> >>> the device.
> >>
> >> pci_epc_set_bar() is used for mapping BAR.
> > Thanks Kishon.
> > what about address mapping ? Synopsys has this functionality if I
> > recall correctly.
>
> The addresses that the RC will put in BAR's is not known while we initialize
> the endpoint. So we really can't map BAR's PCI address to an inbound address
> while EP initialization.
>
> I think some older version of Synopsys had this (and didn't have BAR mapping).
> Actually TI's K2G had this IP. However the ATU registers here are mapped to
> BAR0. So the host side PCI driver can program the PCI address (that the RC has
> allocated for BARs) in ATU.
Yes. you're right.
Thanks for the clarification.
>
> Thanks
> Kishon

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ