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Message-ID: <1534328582-17664-3-git-send-email-thunder.leizhen@huawei.com>
Date: Wed, 15 Aug 2018 18:23:02 +0800
From: Zhen Lei <thunder.leizhen@...wei.com>
To: Robin Murphy <robin.murphy@....com>,
Will Deacon <will.deacon@....com>,
Joerg Roedel <joro@...tes.org>,
linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
iommu <iommu@...ts.linux-foundation.org>,
linux-kernel <linux-kernel@...r.kernel.org>
CC: Zhen Lei <thunder.leizhen@...wei.com>,
LinuxArm <linuxarm@...wei.com>,
Hanjun Guo <guohanjun@...wei.com>,
Libin <huawei.libin@...wei.com>,
"John Garry" <john.garry@...wei.com>
Subject: [PATCH v3 2/2] iommu/arm-smmu-v3: avoid redundant CMD_SYNCs if possible
More than two CMD_SYNCs maybe adjacent in the command queue, and the first
one has done what others want to do. Drop the redundant CMD_SYNCs can
improve IO performance especially under the pressure scene.
I did the statistics in my test environment, the number of CMD_SYNCs can
be reduced about 1/3. See below:
CMD_SYNCs reduced: 19542181
CMD_SYNCs total: 58098548 (include reduced)
CMDs total: 116197099 (TLBI:SYNC about 1:1)
Signed-off-by: Zhen Lei <thunder.leizhen@...wei.com>
---
drivers/iommu/arm-smmu-v3.c | 22 +++++++++++++++++++---
1 file changed, 19 insertions(+), 3 deletions(-)
diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c
index 3f5c236..ee0219b 100644
--- a/drivers/iommu/arm-smmu-v3.c
+++ b/drivers/iommu/arm-smmu-v3.c
@@ -567,6 +567,7 @@ struct arm_smmu_device {
int gerr_irq;
int combined_irq;
u32 sync_nr;
+ u8 prev_cmd_opcode;
unsigned long ias; /* IPA */
unsigned long oas; /* PA */
@@ -780,6 +781,11 @@ static inline void arm_smmu_cmdq_sync_set_msidata(u64 *cmd, u32 msidata)
cmd[0] |= FIELD_PREP(CMDQ_SYNC_0_MSIDATA, msidata);
}
+static inline u8 arm_smmu_cmd_opcode_get(u64 *cmd)
+{
+ return cmd[0] & CMDQ_0_OP;
+}
+
/* High-level queue accessors */
static int arm_smmu_cmdq_build_cmd(u64 *cmd, struct arm_smmu_cmdq_ent *ent)
{
@@ -904,6 +910,8 @@ static void arm_smmu_cmdq_insert_cmd(struct arm_smmu_device *smmu, u64 *cmd)
struct arm_smmu_queue *q = &smmu->cmdq.q;
bool wfe = !!(smmu->features & ARM_SMMU_FEAT_SEV);
+ smmu->prev_cmd_opcode = arm_smmu_cmd_opcode_get(cmd);
+
while (queue_insert_raw(q, cmd) == -ENOSPC) {
if (queue_poll_cons(q, false, wfe))
dev_err_ratelimited(smmu->dev, "CMDQ timeout\n");
@@ -958,9 +966,17 @@ static int __arm_smmu_cmdq_issue_sync_msi(struct arm_smmu_device *smmu)
arm_smmu_cmdq_build_cmd(cmd, &ent);
spin_lock_irqsave(&smmu->cmdq.lock, flags);
- ent.sync.msidata = ++smmu->sync_nr;
- arm_smmu_cmdq_sync_set_msidata(cmd, ent.sync.msidata);
- arm_smmu_cmdq_insert_cmd(smmu, cmd);
+ if (smmu->prev_cmd_opcode == CMDQ_OP_CMD_SYNC) {
+ /*
+ * Previous command is CMD_SYNC also, there is no need to add
+ * one more. Just poll it.
+ */
+ ent.sync.msidata = smmu->sync_nr;
+ } else {
+ ent.sync.msidata = ++smmu->sync_nr;
+ arm_smmu_cmdq_sync_set_msidata(cmd, ent.sync.msidata);
+ arm_smmu_cmdq_insert_cmd(smmu, cmd);
+ }
spin_unlock_irqrestore(&smmu->cmdq.lock, flags);
return __arm_smmu_sync_poll_msi(smmu, ent.sync.msidata);
--
1.8.3
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