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Message-ID: <CADnq5_NfTLXxLrsx+hUnfShPZFfVpzposmnmXe5WXV_R_WMZig@mail.gmail.com>
Date: Tue, 21 Aug 2018 14:03:06 -0400
From: Alex Deucher <alexdeucher@...il.com>
To: Randy Dunlap <rdunlap@...radead.org>
Cc: wen.yang99@....com.cn, Dave Airlie <airlied@...ux.ie>,
Chunming Zhou <David1.Zhou@....com>, zhong.weidong@....com.cn,
LKML <linux-kernel@...r.kernel.org>,
Maling list - DRI developers
<dri-devel@...ts.freedesktop.org>,
amd-gfx list <amd-gfx@...ts.freedesktop.org>,
"Deucher, Alexander" <alexander.deucher@....com>,
jiang.biao2@....com.cn, Christian Koenig <christian.koenig@....com>
Subject: Re: [PATCH] drm/amd/display: fix a compile warning
On Fri, Aug 17, 2018 at 3:01 PM Randy Dunlap <rdunlap@...radead.org> wrote:
>
> On 08/16/2018 08:09 PM, Wen Yang wrote:
> > Fix comile warning like,
> > CC [M] drivers/gpu/drm/i915/gvt/execlist.o
> > CC [M] drivers/gpu/drm/nouveau/nvkm/subdev/instmem/nv50.o
> > CC [M] drivers/gpu/drm/radeon/btc_dpm.o
> > CC [M] drivers/isdn/hisax/avm_a1p.o
> > CC [M] drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_dpp.o
> > drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c: In function ‘dcn10_update_mpcc’:
> > drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c:1903:9: warning: missing braces around initializer [-Wmissing-braces]
> > struct mpcc_blnd_cfg blnd_cfg = {0};
> > ^
> > drivers/gpu/drm/amd/amdgpu/../display/dc/dcn10/dcn10_hw_sequencer.c:1903:9: warning: (near initialization for ‘blnd_cfg.black_color’) [-Wmissing-braces]
> >
> > Signed-off-by: Wen Yang <wen.yang99@....com.cn>
> > Reviewed-by: Jiang Biao <jiang.biao2@....com.cn>
>
> works for me. Thanks.
>
> Acked-by: Randy Dunlap <rdunlap@...radead.org>
>
Applied. thanks!
Alex
>
> > ---
> > drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
> > index cfcc54f..a06a035 100644
> > --- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
> > +++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
> > @@ -1900,7 +1900,7 @@ static void update_dpp(struct dpp *dpp, struct dc_plane_state *plane_state)
> > static void dcn10_update_mpcc(struct dc *dc, struct pipe_ctx *pipe_ctx)
> > {
> > struct hubp *hubp = pipe_ctx->plane_res.hubp;
> > - struct mpcc_blnd_cfg blnd_cfg = {0};
> > + struct mpcc_blnd_cfg blnd_cfg = {{0}};
> > bool per_pixel_alpha = pipe_ctx->plane_state->per_pixel_alpha && pipe_ctx->bottom_pipe;
> > int mpcc_id;
> > struct mpcc *new_mpcc;
> >
>
>
> --
> ~Randy
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