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Message-ID: <d2f40cc2-b344-69d1-4314-83524ad7b178@synopsys.com>
Date: Wed, 22 Aug 2018 17:43:34 +0100
From: vitor <Vitor.Soares@...opsys.com>
To: Boris Brezillon <boris.brezillon@...tlin.com>,
Wolfram Sang <wsa@...-dreams.de>, <linux-i2c@...r.kernel.org>,
Jonathan Corbet <corbet@....net>, <linux-doc@...r.kernel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Arnd Bergmann <arnd@...db.de>
CC: Przemyslaw Sroka <psroka@...ence.com>,
Arkadiusz Golec <agolec@...ence.com>,
Alan Douglas <adouglas@...ence.com>,
Bartosz Folta <bfolta@...ence.com>,
Damian Kos <dkos@...ence.com>,
Alicja Jurasik-Urbaniak <alicja@...ence.com>,
Cyprian Wronka <cwronka@...ence.com>,
Suresh Punnoose <sureshp@...ence.com>,
Rafal Ciepiela <rafalc@...ence.com>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Nishanth Menon <nm@...com>, Rob Herring <robh+dt@...nel.org>,
Pawel Moll <pawel.moll@....com>,
Mark Rutland <mark.rutland@....com>,
Ian Campbell <ijc+devicetree@...lion.org.uk>,
"Kumar Gala" <galak@...eaurora.org>, <devicetree@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
Vitor Soares <Vitor.Soares@...opsys.com>,
Geert Uytterhoeven <geert@...ux-m68k.org>,
Linus Walleij <linus.walleij@...aro.org>,
Xiang Lin <Xiang.Lin@...aptics.com>,
<linux-gpio@...r.kernel.org>, Sekhar Nori <nsekhar@...com>,
Przemyslaw Gaj <pgaj@...ence.com>,
Peter Rosin <peda@...ntia.se>
Subject: Re: [PATCH v6 01/10] i3c: Add core I3C infrastructure
Hi Boris,
On 19-07-2018 16:29, Boris Brezillon wrote:
> +int i3c_bus_register(struct i3c_bus *i3cbus)
> +{
> + struct i2c_dev_desc *desc;
> +
> + i3c_bus_for_each_i2cdev(i3cbus, desc) {
> + switch (desc->boardinfo->lvr & I3C_LVR_I2C_INDEX_MASK) {
> + case I3C_LVR_I2C_INDEX(0):
> + if (i3cbus->mode < I3C_BUS_MODE_MIXED_FAST)
> + i3cbus->mode = I3C_BUS_MODE_MIXED_FAST;
> + break;
> +
> + case I3C_LVR_I2C_INDEX(1):
> + case I3C_LVR_I2C_INDEX(2):
> + if (i3cbus->mode < I3C_BUS_MODE_MIXED_SLOW)
> + i3cbus->mode = I3C_BUS_MODE_MIXED_SLOW;
> + break;
> +
> + default:
> + return -EINVAL;
> + }
> + }
> +
> + if (!i3cbus->scl_rate.i3c)
> + i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
> +
> + if (!i3cbus->scl_rate.i2c) {
> + if (i3cbus->mode == I3C_BUS_MODE_MIXED_SLOW)
> + i3cbus->scl_rate.i2c = I3C_BUS_I2C_FM_SCL_RATE;
> + else
> + i3cbus->scl_rate.i2c = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
> + }
> +
> + /*
> + * I3C/I2C frequency may have been overridden, check that user-provided
> + * values are not exceeding max possible frequency.
> + */
> + if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
> + i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE) {
> + return -EINVAL;
> + }
> +
> + dev_set_name(&i3cbus->dev, "i3c-%d", i3cbus->id);
> +
> + return device_add(&i3cbus->dev);
> +}
During the tests of the bus with i2c devices I found the i2c_dev_desc
objects aren't allocated before this function. This cause i3cbus->mode =
I3C_BUS_MODE_PURE.
I want to do something for the slave and secondary master, do you
already have infrastructure that you can share?
Best regards,
Vitor Soares
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