linux-kernel - Re: [PATCH v7 2/2] cpufreq: qcom-hw: Add support for QCOM cpufreq HW driver

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <153504951102.28926.11593809590549791317@swboyd.mtv.corp.google.com>
Date:   Thu, 23 Aug 2018 11:38:31 -0700
From:   Stephen Boyd <sboyd@...nel.org>
To:     Taniya Das <tdas@...eaurora.org>, skannan@...eaurora.org
Cc:     Evan Green <evgreen@...gle.com>, rjw@...ysocki.net,
        Viresh Kumar <viresh.kumar@...aro.org>,
        linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
        Rajendra Nayak <rnayak@...eaurora.org>,
        anischal@...eaurora.org, devicetree@...r.kernel.org,
        robh@...nel.org, amit.kucheria@...aro.org
Subject: Re: [PATCH v7 2/2] cpufreq: qcom-hw: Add support for QCOM cpufreq HW driver

Quoting Taniya Das (2018-08-08 03:15:26)
> 
> 
> On 8/8/2018 11:52 AM, Stephen Boyd wrote:
> >>
> >> Binding describes hardware controllable by the OS. That's the reality.
> >> Let's not add mandatory clock bindings for clocks that the OS can't do
> >> anything about.
> >>
> > 
> > It seems that you believe clks should only be used to turn on/off and
> > control rates. That is not the whole truth. Sometimes clks are there
> > just to express the clk frequencies that are present in the design so
> > that drivers can figure out what to do.
> > 
> 
> Stephen,
> 
> As this clock is not configurable by linux clock drivers and we really 
> do not care the parent src(as mentioned by Saravana) to generate the 
> 300MHz, would it be good to define a fixed rate clock so as to express 
> the HW connectivity & frequency?
> 

As a hack that works great, but why do we need to workaround problems by
adding a fixed rate clk to DT for this PLL? The PLL is provided by GCC
node so it should be connected to the GCC node.