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Message-ID: <89b058a7bba26058fab95dea01155221dbb642ce.camel@baylibre.com>
Date: Mon, 27 Aug 2018 15:07:46 +0200
From: Jerome Brunet <jbrunet@...libre.com>
To: Jian Hu <jian.hu@...ogic.com>,
Neil Armstrong <narmstrong@...libre.com>
Cc: Kevin Hilman <khilman@...libre.com>,
Carlo Caione <carlo@...one.org>, Rob Herring <robh@...nel.org>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Yixun Lan <yixun.lan@...ogic.com>,
Jianxin Pan <jianxin.pan@...ogic.com>,
linux-clk@...r.kernel.org, linux-amlogic@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org
Subject: Re: [PATCH 2/2] clk: meson-g12a: Add AO Clock controller driver
On Fri, 2018-08-24 at 21:34 +0800, Jian Hu wrote:
> >
>
> I am confued about aoclk81's parent clocks.
>
> I can not get the example of axg audio clock driver, Could you provide
> the link? Had it merged into clk-meson.git?
Yes and mainline as well : drivers/clk/meson/axg-audio.c
Basically this driver is creating bypass input clocks (audio_pclk, mst_in[0-9],
etc...) .
This allows to collect input clocks from DT (like any consumer should) will
keeping constant in the controller clock tree.
>From what I've seen of your controller drivers, the EE controller should have
one input, the AO should have 3.
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