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Date:   Tue, 28 Aug 2018 14:08:55 +0200
From:   Arnd Bergmann <>
Cc:     Linux Kernel Mailing List <>,
        Olof Johansson <>,
        Linux ARM <>,,,, Thomas Gleixner <>,
        Marc Zyngier <>,
        Jason Cooper <>,
        linux-pci <>
Subject: Re: [PATCH 10/15] soc: octeontx2: Reconfig MSIX base with IOVA

On Tue, Aug 28, 2018 at 12:58 PM <> wrote:
> From: Geetha sowjanya <>
> HW interprets RVU_AF_MSIXTR_BASE address as an IOVA, hence
> create a IOMMU mapping for the physcial address configured by
> firmware and reconfig RVU_AF_MSIXTR_BASE with IOVA.
> Signed-off-by: Geetha sowjanya <>
> Signed-off-by: Sunil Goutham <>

I think this needs some more explanation. What is the difference between
the MSI-X support in this driver and every other one? Are you working
around a hardware bug, or is there something odd in the implementation
of your irqchip driver? Do you use a GIC to handle the MSI interrupts
or something else?


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