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Date:   Tue, 28 Aug 2018 14:08:55 +0200
From:   Arnd Bergmann <arnd@...db.de>
To:     sunil.kovvuri@...il.com
Cc:     Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
        Olof Johansson <olof@...om.net>,
        Linux ARM <linux-arm-kernel@...ts.infradead.org>,
        linux-soc@...r.kernel.org, gakula@...vell.com,
        sgoutham@...vell.com, Thomas Gleixner <tglx@...utronix.de>,
        Marc Zyngier <marc.zyngier@....com>,
        Jason Cooper <jason@...edaemon.net>,
        linux-pci <linux-pci@...r.kernel.org>
Subject: Re: [PATCH 10/15] soc: octeontx2: Reconfig MSIX base with IOVA

On Tue, Aug 28, 2018 at 12:58 PM <sunil.kovvuri@...il.com> wrote:
>
> From: Geetha sowjanya <gakula@...vell.com>
>
> HW interprets RVU_AF_MSIXTR_BASE address as an IOVA, hence
> create a IOMMU mapping for the physcial address configured by
> firmware and reconfig RVU_AF_MSIXTR_BASE with IOVA.
>
> Signed-off-by: Geetha sowjanya <gakula@...vell.com>
> Signed-off-by: Sunil Goutham <sgoutham@...vell.com>

I think this needs some more explanation. What is the difference between
the MSI-X support in this driver and every other one? Are you working
around a hardware bug, or is there something odd in the implementation
of your irqchip driver? Do you use a GIC to handle the MSI interrupts
or something else?

       Arnd

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