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Date: Thu, 30 Aug 2018 18:06:05 +0300 From: Aapo Vienamo <avienamo@...dia.com> To: Rob Herring <robh+dt@...nel.org>, Mark Rutland <mark.rutland@....com>, Thierry Reding <thierry.reding@...il.com>, Jonathan Hunter <jonathanh@...dia.com>, Ulf Hansson <ulf.hansson@...aro.org>, Adrian Hunter <adrian.hunter@...el.com>, Mikko Perttunen <mperttunen@...dia.com>, "Stefan Agner" <stefan@...er.ch> CC: <devicetree@...r.kernel.org>, <linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>, <linux-mmc@...r.kernel.org>, Aapo Vienamo <avienamo@...dia.com> Subject: [PATCH v3 04/38] dt-bindings: mmc: Add Tegra SDHCI sampling trimmer values Document the Tegra SDHCI inbound and outbound sampling trimmer values. Signed-off-by: Aapo Vienamo <avienamo@...dia.com> Acked-by: Thierry Reding <treding@...dia.com> --- .../devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt | 11 +++++++++++ 1 file changed, 11 insertions(+) diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt index 9713e052f736..edecf97231b9 100644 --- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt +++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt @@ -67,6 +67,10 @@ Optional properties for Tegra210 and Tegra186: - nvidia,pad-autocal-pull-up-offset-hs400, nvidia,pad-autocal-pull-down-offset-hs400 : Specify drive strength calibration offsets for HS400 mode. +- nvidia,default-tap : Specify the default inbound sampling clock + trimmer value for non-tunable modes. +- nvidia,default-trim : Specify the default outbound clock trimmer + value. Notes on the pad calibration pull up and pulldown offset values: - The property values are drive codes which are programmed into the @@ -77,6 +81,13 @@ Optional properties for Tegra210 and Tegra186: - The SDR104 and HS400 timing specific values are used in corresponding modes if specified. + Notes on tap and trim values: + - The values are used for compensating trace length differences + by adjusting the sampling point. + - The values are programmed to the Vendor Clock Control Register. + Please refer to the reference manual of the SoC for correct + values. + Example: sdhci@...b0000 { compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci"; -- 2.18.0
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