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Date:   Thu, 30 Aug 2018 17:45:15 +0200
From:   Philipp Rossak <embed3d@...il.com>
To:     lee.jones@...aro.org, robh+dt@...nel.org, mark.rutland@....com,
        maxime.ripard@...tlin.com, wens@...e.org, linux@...linux.org.uk,
        jic23@...nel.org, knaack.h@....de, lars@...afoo.de,
        pmeerw@...erw.net, eugen.hristev@...rochip.com,
        rdunlap@...radead.org, vilhelm.gray@...il.com,
        clabbe.montjoie@...il.com, quentin.schulz@...tlin.com,
        geert+renesas@...der.be, lukas@...ner.de, icenowy@...c.io,
        arnd@...db.de, broonie@...nel.org, arnaud.pouliquen@...com
Cc:     linux-iio@...r.kernel.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-sunxi@...glegroups.com
Subject: [PATCH v3 27/30] ARM: dts: sun8i: h3: use calibration for ths

The H3 SID is supported by the kernel so we can add a NVMEM Data cell,
that contains the calibration data.

On the H3 the eFuses are located at the offset 0x200. The thermal data
itself has an offset of 0x34 from the eFuse base. So we end on an offset
of 0x234.

Signed-off-by: Philipp Rossak <embed3d@...il.com>
---
 arch/arm/boot/dts/sun8i-h3.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-h3.dtsi b/arch/arm/boot/dts/sun8i-h3.dtsi
index 1866aec69ec1..0fc447f0c02a 100644
--- a/arch/arm/boot/dts/sun8i-h3.dtsi
+++ b/arch/arm/boot/dts/sun8i-h3.dtsi
@@ -106,8 +106,15 @@
 
 	soc {
 		sid: eeprom@...4000 {
+			#address-cells = <1>;
+			#size-cells = <1>;
 			compatible = "allwinner,sun8i-h3-sid";
 			reg = <0x01c14000 0x400>;
+
+			/* Data cells */
+			thermal_calibration: calib@234 {
+				reg = <0x234 0x8>;
+			};
 		};
 	};
 
@@ -227,4 +234,6 @@
 &ths {
 	compatible = "allwinner,sun8i-h3-ths";
 	#thermal-sensor-cells = <0>;
+	nvmem-cells = <&thermal_calibration>;
+	nvmem-cell-names = "calibration";
 };
-- 
2.11.0

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