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Date: Thu, 30 Aug 2018 09:22:26 -0700 From: Yu-cheng Yu <yu-cheng.yu@...el.com> To: Andy Lutomirski <luto@...capital.net>, Jann Horn <jannh@...gle.com> Cc: the arch/x86 maintainers <x86@...nel.org>, "H . Peter Anvin" <hpa@...or.com>, Thomas Gleixner <tglx@...utronix.de>, Ingo Molnar <mingo@...hat.com>, kernel list <linux-kernel@...r.kernel.org>, linux-doc@...r.kernel.org, Linux-MM <linux-mm@...ck.org>, linux-arch <linux-arch@...r.kernel.org>, Linux API <linux-api@...r.kernel.org>, Arnd Bergmann <arnd@...db.de>, Balbir Singh <bsingharora@...il.com>, Cyrill Gorcunov <gorcunov@...il.com>, Dave Hansen <dave.hansen@...ux.intel.com>, Florian Weimer <fweimer@...hat.com>, "H. J. Lu" <hjl.tools@...il.com>, Jonathan Corbet <corbet@....net>, Kees Cook <keescook@...omiun.org>, Mike Kravetz <mike.kravetz@...cle.com>, Nadav Amit <nadav.amit@...il.com>, Oleg Nesterov <oleg@...hat.com>, Pavel Machek <pavel@....cz>, Peter Zijlstra <peterz@...radead.org>, "Ravi V. Shankar" <ravi.v.shankar@...el.com>, "Shanbhogue, Vedvyas" <vedvyas.shanbhogue@...el.com> Subject: Re: [RFC PATCH v3 19/24] x86/cet/shstk: Introduce WRUSS instruction On Thu, 2018-08-30 at 08:55 -0700, Andy Lutomirski wrote: > On Thu, Aug 30, 2018 at 8:39 AM, Jann Horn <jannh@...gle.com> wrote: > > > > On Thu, Aug 30, 2018 at 4:44 PM Yu-cheng Yu <yu-cheng.yu@...el.com > > > wrote: > > > > > > > > > WRUSS is a new kernel-mode instruction but writes directly > > > to user shadow stack memory. This is used to construct > > > a return address on the shadow stack for the signal > > > handler. > > > > > > This instruction can fault if the user shadow stack is > > > invalid shadow stack memory. In that case, the kernel does > > > fixup. > > > > > > Signed-off-by: Yu-cheng Yu <yu-cheng.yu@...el.com> > > [...] > > > > > > +static inline int write_user_shstk_64(unsigned long addr, > > > unsigned long val) > > > +{ > > > + int err = 0; > > > + > > > + asm volatile("1: wrussq %1, (%0)\n" > > > + "2:\n" > > > + _ASM_EXTABLE_HANDLE(1b, 2b, > > > ex_handler_wruss) > > > + : > > > + : "r" (addr), "r" (val)); > > > + > > > + return err; > > > +} > > What's up with "err"? You set it to zero, and then you return it, > > but > > nothing can ever set it to non-zero, right? > > > > > > > > +__visible bool ex_handler_wruss(const struct > > > exception_table_entry *fixup, > > > + struct pt_regs *regs, int > > > trapnr) > > > +{ > > > + regs->ip = ex_fixup_addr(fixup); > > > + regs->ax = -1; > > > + return true; > > > +} > > And here you just write into regs->ax, but your "asm volatile" > > doesn't > > reserve that register. This looks wrong to me. > > > > I think you probably want to add something like an explicit > > `"+&a"(err)` output to the asm statements. > We require asm goto support these days. How about using that? You > won't even need a special exception handler. > > Also, please change the BUG to WARN in the you-did-it-wrong 32-bit > case. And return -EFAULT. > > --Andy I will look into that. Yu-cheng
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