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Date:   Fri, 31 Aug 2018 14:54:57 +0300
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     Alexandre Belloni <alexandre.belloni@...tlin.com>
Cc:     Mark Brown <broonie@...nel.org>, linux-spi@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        Allan Nielsen <allan.nielsen@...rochip.com>
Subject: Re: [PATCH] spi: dw-mmio: avoid hardcoded field mask

On Fri, Aug 31, 2018 at 01:40:46PM +0200, Alexandre Belloni wrote:
> Define a mask for the IF_SI_OWNER field.
> 

Thanks!

Acked-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>

> Signed-off-by: Alexandre Belloni <alexandre.belloni@...tlin.com>
> ---
>  drivers/spi/spi-dw-mmio.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c
> index 351f49976161..a768461614a0 100644
> --- a/drivers/spi/spi-dw-mmio.c
> +++ b/drivers/spi/spi-dw-mmio.c
> @@ -36,6 +36,7 @@ struct dw_spi_mmio {
>  #define MSCC_CPU_SYSTEM_CTRL_GENERAL_CTRL	0x24
>  #define OCELOT_IF_SI_OWNER_OFFSET		4
>  #define JAGUAR2_IF_SI_OWNER_OFFSET		6
> +#define MSCC_IF_SI_OWNER_MASK			GENMASK(1, 0)
>  #define MSCC_IF_SI_OWNER_SISL			0
>  #define MSCC_IF_SI_OWNER_SIBM			1
>  #define MSCC_IF_SI_OWNER_SIMC			2
> @@ -102,7 +103,7 @@ static int dw_spi_mscc_init(struct platform_device *pdev,
>  
>  	/* Select the owner of the SI interface */
>  	regmap_update_bits(dwsmscc->syscon, MSCC_CPU_SYSTEM_CTRL_GENERAL_CTRL,
> -			   0x3 << if_si_owner_offset,
> +			   MSCC_IF_SI_OWNER_MASK << if_si_owner_offset,
>  			   MSCC_IF_SI_OWNER_SIMC << if_si_owner_offset);
>  
>  	dwsmmio->dws.set_cs = dw_spi_mscc_set_cs;
> -- 
> 2.19.0.rc1
> 

-- 
With Best Regards,
Andy Shevchenko


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