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Message-ID: <DB5PR0401MB221332A5ED14C8E14C8D18A1F30C0@DB5PR0401MB2213.eurprd04.prod.outlook.com>
Date: Mon, 3 Sep 2018 01:17:55 +0000
From: Andy Tang <andy.tang@....com>
To: Scott Wood <oss@...error.net>,
Vabhav Sharma <vabhav.sharma@....com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"robh+dt@...nel.org" <robh+dt@...nel.org>,
"mark.rutland@....com" <mark.rutland@....com>,
"linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>,
"mturquette@...libre.com" <mturquette@...libre.com>,
"sboyd@...nel.org" <sboyd@...nel.org>,
"rjw@...ysocki.net" <rjw@...ysocki.net>,
"viresh.kumar@...aro.org" <viresh.kumar@...aro.org>,
"linux-clk@...r.kernel.org" <linux-clk@...r.kernel.org>,
"linux-pm@...r.kernel.org" <linux-pm@...r.kernel.org>,
"linux-kernel-owner@...r.kernel.org"
<linux-kernel-owner@...r.kernel.org>,
"catalin.marinas@....com" <catalin.marinas@....com>,
"will.deacon@....com" <will.deacon@....com>,
"gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
"arnd@...db.de" <arnd@...db.de>,
"kstewart@...uxfoundation.org" <kstewart@...uxfoundation.org>,
"yamada.masahiro@...ionext.com" <yamada.masahiro@...ionext.com>
CC: Yogesh Narayan Gaur <yogeshnarayan.gaur@....com>,
"linux@...linux.org.uk" <linux@...linux.org.uk>,
Udit Kumar <udit.kumar@....com>, Varun Sethi <V.Sethi@....com>
Subject: RE: [PATCH 3/5] drivers: clk-qoriq: Add clockgen support for lx2160a
Hi Scott,
Please see my replay in line.
> -----Original Message-----
> From: Linuxppc-dev
> <linuxppc-dev-bounces+b29983=freescale.com@...ts.ozlabs.org> On
> Behalf Of Scott Wood
> Sent: 2018年9月1日 4:29
> To: Andy Tang <andy.tang@....com>; Vabhav Sharma
> <vabhav.sharma@....com>; linux-kernel@...r.kernel.org;
> devicetree@...r.kernel.org; robh+dt@...nel.org;
> mark.rutland@....com; linuxppc-dev@...ts.ozlabs.org;
> linux-arm-kernel@...ts.infradead.org; mturquette@...libre.com;
> sboyd@...nel.org; rjw@...ysocki.net; viresh.kumar@...aro.org;
> linux-clk@...r.kernel.org; linux-pm@...r.kernel.org;
> linux-kernel-owner@...r.kernel.org; catalin.marinas@....com;
> will.deacon@....com; gregkh@...uxfoundation.org; arnd@...db.de;
> kstewart@...uxfoundation.org; yamada.masahiro@...ionext.com
> Cc: Yogesh Narayan Gaur <yogeshnarayan.gaur@....com>;
> linux@...linux.org.uk; Udit Kumar <udit.kumar@....com>; Varun Sethi
> <V.Sethi@....com>
> Subject: Re: [PATCH 3/5] drivers: clk-qoriq: Add clockgen support for
> lx2160a
>
> On Fri, 2018-08-31 at 06:12 +0000, Andy Tang wrote:
> > Hi Scott,
> >
> > Please see my replay inline.
> >
> > > -----Original Message-----
> > > From: linux-arm-kernel
> > > <linux-arm-kernel-bounces@...ts.infradead.org>
> > > On Behalf Of Scott Wood
> > > Sent: 2018年8月31日 1:43
> > > To: Vabhav Sharma <vabhav.sharma@....com>;
> > > linux-kernel@...r.kernel.org; devicetree@...r.kernel.org;
> > > robh+dt@...nel.org; mark.rutland@....com;
> > > linuxppc-dev@...ts.ozlabs.org; linux-arm-kernel@...ts.infradead.org;
> > > mturquette@...libre.com; sboyd@...nel.org; rjw@...ysocki.net;
> > > viresh.kumar@...aro.org; linux-clk@...r.kernel.org;
> > > linux-pm@...r.kernel.org; linux-kernel-owner@...r.kernel.org;
> > > catalin.marinas@....com; will.deacon@....com;
> > > gregkh@...uxfoundation.org; arnd@...db.de;
> > > kstewart@...uxfoundation.org; yamada.masahiro@...ionext.com
> > > Cc: Yogesh Narayan Gaur <yogeshnarayan.gaur@....com>; Andy Tang
> > > <andy.tang@....com>; linux@...linux.org.uk; Varun Sethi
> > > <V.Sethi@....com>; Udit Kumar <udit.kumar@....com>
> > > Subject: Re: [PATCH 3/5] drivers: clk-qoriq: Add clockgen support
> > > for lx2160a
> > >
> > > On Thu, 2018-08-30 at 12:39 -0500, Scott Wood wrote:
> > > > On Thu, 2018-08-30 at 07:36 +0000, Vabhav Sharma wrote:
> > > > > >
> > > > > > Why are you increasing NUM_CMUX beyond 8 for a chip that
> only
> > >
> > > has
> > > > > > 8 entries in cmux_to_group?
> > > > >
> > > > > Configuration is 16 cores,8 cluster with 2 cores in each cluster
> > > >
> > > > So? This is about cmuxes, not cores. You're increasing the array
> > > > without ever using the new size.
> > >
> > > Oh, and you also broke p4080 which has 8 cmuxes but no -1
> > > terminator, because the array was of length 8. Probably the array
> > > should be changed to NUM_CMUX+1 so every array can be -1
> terminated.
> > >
> >
> > [Andy] How about we add -1 terminator to p4080 and increase
> NUM_CMUX to 16?
>
> Why 16? What does such a change have to do with this chip, which
> according to the rest of the patch has 8 cmuxes?
[Andy] NUM_CMUX is a limitation number. We better give it an extra buffer, not exactly equal to the limitation.
16 is the limitation number with extra buffer.
>
> > We don't want to increase NUM_CMUX each time new soc with more
> cmuxes added.
>
> You don't want to have to make a trivial change each time you exceed a
> limit that has yet to be exceeded once since NUM_CMUX was added?
> This isn't ABI or in any other way hard to change. It's right in the same file
> as the chip description you'd be adding.
>
> And even if a chip did come along with 16 cmuxes, you'd then need to
> increase the array to 17 to hold the -1 if you don't want to leave a situation
> like the
> p4080 is in now, where a chip's cmux array could be broken by increasing
> NUM_CMUX further.
>
[Andy] Adding buffer to a limitation number is always a good habit when coding. We often forget to increase this value when
a new chip with more cmuxes added. Like this patch, we didn't increase this value at first. We spent a lot of time finding out that NUM_CMUX needs to be increased too.
It is a personal preference how to set this value. I think it is better to increase it to 16, not NUM_CMUX+1 as long as we fix the P4080 issue
even though it is a trivial change. And I agree the description needs to be updated.
BR,
Andy
> -Scott
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