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Date: Mon, 3 Sep 2018 11:33:03 +0200 From: Quentin Schulz <quentin.schulz@...tlin.com> To: alexandre.belloni@...tlin.com, ralf@...ux-mips.org, paul.burton@...s.com, jhogan@...nel.org, robh+dt@...nel.org, mark.rutland@....com, davem@...emloft.net, kishon@...com, andrew@...n.ch, f.fainelli@...il.com Cc: allan.nielsen@...rochip.com, linux-mips@...ux-mips.org, devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, netdev@...r.kernel.org, thomas.petazzoni@...tlin.com, Quentin Schulz <quentin.schulz@...tlin.com> Subject: [PATCH v2 06/11] phy: add QSGMII and PCIE modes Prepare for upcoming phys that'll handle QSGMII or PCIe. Signed-off-by: Quentin Schulz <quentin.schulz@...tlin.com> --- include/linux/phy/phy.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/include/linux/phy/phy.h b/include/linux/phy/phy.h index 9713aebdd348..03b319f89a34 100644 --- a/include/linux/phy/phy.h +++ b/include/linux/phy/phy.h @@ -37,9 +37,11 @@ enum phy_mode { PHY_MODE_USB_OTG, PHY_MODE_SGMII, PHY_MODE_2500SGMII, + PHY_MODE_QSGMII, PHY_MODE_10GKR, PHY_MODE_UFS_HS_A, PHY_MODE_UFS_HS_B, + PHY_MODE_PCIE, }; /** -- 2.17.1
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