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Message-Id: <20180903100201.23131-9-clabbe.montjoie@gmail.com>
Date:   Mon,  3 Sep 2018 12:02:00 +0200
From:   Corentin Labbe <clabbe.montjoie@...il.com>
To:     axboe@...nel.dk, hdegoede@...hat.com, mark.rutland@....com,
        maxime.ripard@...tlin.com, robh+dt@...nel.org, wens@...e.org
Cc:     devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-ide@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-sunxi@...glegroups.com,
        Corentin Labbe <clabbe.montjoie@...il.com>,
        Icenowy Zheng <icenowy@...c.io>
Subject: [PATCH v5 8/9] ARM: dts: sun8i: r40: add sata node

R40 have a sata controller which is the same as A20.
This patch adds a DT node for it.

Signed-off-by: Icenowy Zheng <icenowy@...c.io>
Signed-off-by: Corentin Labbe <clabbe.montjoie@...il.com>
---
 arch/arm/boot/dts/sun8i-r40.dtsi | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/arch/arm/boot/dts/sun8i-r40.dtsi b/arch/arm/boot/dts/sun8i-r40.dtsi
index 852c2ccc3268..d27c522e1918 100644
--- a/arch/arm/boot/dts/sun8i-r40.dtsi
+++ b/arch/arm/boot/dts/sun8i-r40.dtsi
@@ -550,6 +550,19 @@
 			#size-cells = <0>;
 		};
 
+		ahci: sata@...8000 {
+			compatible = "allwinner,sun8i-r40-ahci";
+			reg = <0x01c18000 0x1000>;
+			interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
+			clocks = <&ccu CLK_BUS_SATA>, <&ccu CLK_SATA>;
+			resets = <&ccu RST_BUS_SATA>;
+			resets-name = "ahci";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			status = "disabled";
+
+		};
+
 		gmac: ethernet@...0000 {
 			compatible = "allwinner,sun8i-r40-gmac";
 			syscon = <&ccu>;
-- 
2.16.4

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