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Message-ID: <20180904094455.cxafsiiquipjgkaz@gondor.apana.org.au>
Date:   Tue, 4 Sep 2018 17:44:55 +0800
From:   Herbert Xu <herbert@...dor.apana.org.au>
To:     Will Deacon <will.deacon@....com>
Cc:     Ard Biesheuvel <ard.biesheuvel@...aro.org>,
        linux-arm-kernel <linux-arm-kernel@...ts.infradead.org>,
        "open list:HARDWARE RANDOM NUMBER GENERATOR CORE" 
        <linux-crypto@...r.kernel.org>,
        Catalin Marinas <catalin.marinas@....com>,
        Eric Biggers <ebiggers@...gle.com>,
        "Suzuki K. Poulose" <suzuki.poulose@....com>,
        Linux Kernel Mailing List <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 2/4] arm64: cpufeature: add feature for CRC32 instructions

On Tue, Sep 04, 2018 at 10:38:45AM +0100, Will Deacon wrote:
> On Tue, Sep 04, 2018 at 11:18:55AM +0800, Herbert Xu wrote:
> > On Tue, Aug 28, 2018 at 08:43:35PM +0200, Ard Biesheuvel wrote:
> > > On 28 August 2018 at 19:01, Will Deacon <will.deacon@....com> wrote:
> > > > On Mon, Aug 27, 2018 at 01:02:43PM +0200, Ard Biesheuvel wrote:
> > > >> Add a CRC32 feature bit and wire it up to the CPU id register so we
> > > >> will be able to use alternatives patching for CRC32 operations.
> > > >>
> > > >> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@...aro.org>
> > > >> ---
> > > >>  arch/arm64/include/asm/cpucaps.h | 3 ++-
> > > >>  arch/arm64/kernel/cpufeature.c   | 9 +++++++++
> > > >>  2 files changed, 11 insertions(+), 1 deletion(-)
> > > >
> > > > Acked-by: Will Deacon <will.deacon@....com>
> > > >
> > > > With the minor caveat below...
> > > >
> > > >> diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h
> > > >> index ae1f70450fb2..9932aca9704b 100644
> > > >> --- a/arch/arm64/include/asm/cpucaps.h
> > > >> +++ b/arch/arm64/include/asm/cpucaps.h
> > > >> @@ -51,7 +51,8 @@
> > > >>  #define ARM64_SSBD                           30
> > > >>  #define ARM64_MISMATCHED_CACHE_TYPE          31
> > > >>  #define ARM64_HAS_STAGE2_FWB                 32
> > > >> +#define ARM64_HAS_CRC32                              33
> > > >>
> > > >> -#define ARM64_NCAPS                          33
> > > >> +#define ARM64_NCAPS                          34
> > > >
> > > >
> > > > ... if this goes via crypto, you'll almost certainly get a (trivial)
> > > > conflict with arm64, since these numbers get bumped all the time.
> > > >
> > > 
> > > I think the first three patches should go through the arm64 tree. The
> > > last one just removes the now redundant crc32 SIMD driver, and Herbert
> > > could pick that up separately, i.e., it should be totally independent.
> > 
> > Yes let's do that.
> 
> Okey doke! In which case, please can we have your Ack on the first patch?

Sure, I have just sent an ack for that patch.

Cheers,
-- 
Email: Herbert Xu <herbert@...dor.apana.org.au>
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt

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