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Message-Id: <1536221135-182613-5-git-send-email-atish.patra@wdc.com>
Date: Thu, 6 Sep 2018 01:05:27 -0700
From: Atish Patra <atish.patra@....com>
To: palmer@...ive.com, linux-riscv@...ts.infradead.org,
hch@...radead.org, anup@...infault.org
Cc: mark.rutland@....com, atish.patra@....com, tglx@...utronix.de,
linux-kernel@...r.kernel.org, Damien.LeMoal@....com,
marc.zyngier@....com, jeremy.linton@....com,
gregkh@...uxfoundation.org, jason@...edaemon.net,
catalin.marinas@....com, dmitriy@...-tech.org,
ard.biesheuvel@...aro.org
Subject: [PATCH v3 04/12] RISC-V: Disable preemption before enabling interrupts
Currently, irq is enabled before preemption disabling happens.
If the scheduler fired right here and cpu is scheduled then it
may blow up.
Signed-off-by: Palmer Dabbelt <palmer@...ive.com>
[Atish: Commit text and code comment formatting update]
Signed-off-by: Atish Patra <atish.patra@....com>
---
arch/riscv/kernel/smpboot.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/riscv/kernel/smpboot.c b/arch/riscv/kernel/smpboot.c
index 712e9ca8..670749ec 100644
--- a/arch/riscv/kernel/smpboot.c
+++ b/arch/riscv/kernel/smpboot.c
@@ -111,7 +111,11 @@ asmlinkage void __init smp_callin(void)
* a local TLB flush right now just in case.
*/
local_flush_tlb_all();
- local_irq_enable();
+ /*
+ * Disable preemption before enabling interrupts, so we don't try to
+ * schedule a CPU that hasn't actually started yet.
+ */
preempt_disable();
+ local_irq_enable();
cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
}
--
2.7.4
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