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Message-Id: <1536221135-182613-2-git-send-email-atish.patra@wdc.com>
Date: Thu, 6 Sep 2018 01:05:24 -0700
From: Atish Patra <atish.patra@....com>
To: palmer@...ive.com, linux-riscv@...ts.infradead.org,
hch@...radead.org, anup@...infault.org
Cc: mark.rutland@....com, atish.patra@....com, tglx@...utronix.de,
linux-kernel@...r.kernel.org, Damien.LeMoal@....com,
marc.zyngier@....com, jeremy.linton@....com,
gregkh@...uxfoundation.org, jason@...edaemon.net,
catalin.marinas@....com, dmitriy@...-tech.org,
ard.biesheuvel@...aro.org
Subject: [PATCH v3 01/12] RISC-V: Don't set cacheinfo.{physical_line_partition,attributes}
From: Palmer Dabbelt <palmer@...ive.com>
These are just hard coded in the RISC-V port, which doesn't make any
sense. We should probably be setting these from device tree entries
when they exist, but for now I think it's saner to just leave them all
as their default values.
Signed-off-by: Palmer Dabbelt <palmer@...ive.com>
Reviewed-by: Christoph Hellwig <hch@....de>
Reviewed-by: Jeremy Linton <jeremy.linton@....com>
---
arch/riscv/kernel/cacheinfo.c | 7 -------
1 file changed, 7 deletions(-)
diff --git a/arch/riscv/kernel/cacheinfo.c b/arch/riscv/kernel/cacheinfo.c
index 0bc86e5f..cb35ffd8 100644
--- a/arch/riscv/kernel/cacheinfo.c
+++ b/arch/riscv/kernel/cacheinfo.c
@@ -22,13 +22,6 @@ static void ci_leaf_init(struct cacheinfo *this_leaf,
{
this_leaf->level = level;
this_leaf->type = type;
- /* not a sector cache */
- this_leaf->physical_line_partition = 1;
- /* TODO: Add to DTS */
- this_leaf->attributes =
- CACHE_WRITE_BACK
- | CACHE_READ_ALLOCATE
- | CACHE_WRITE_ALLOCATE;
}
static int __init_cache_level(unsigned int cpu)
--
2.7.4
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