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Message-ID: <8aef58c7-c27c-5df8-69b3-b188dd5f64e8@intel.com>
Date:   Thu, 6 Sep 2018 10:21:38 -0700
From:   Dave Hansen <dave.hansen@...el.com>
To:     Nadav Amit <namit@...are.com>, Thomas Gleixner <tglx@...utronix.de>
Cc:     linux-kernel@...r.kernel.org, Ingo Molnar <mingo@...hat.com>,
        x86@...nel.org, Dave Hansen <dave.hansen@...ux.intel.com>,
        Nadav Amit <nadav.amit@...il.com>,
        Andi Kleen <ak@...ux.intel.com>,
        Josh Poimboeuf <jpoimboe@...hat.com>,
        Michal Hocko <mhocko@...e.com>,
        Vlastimil Babka <vbabka@...e.cz>,
        Sean Christopherson <sean.j.christopherson@...el.com>,
        Andy Lutomirski <luto@...nel.org>
Subject: Re: [PATCH] x86: use WRITE_ONCE() when setting PTEs

On 09/02/2018 11:14 AM, Nadav Amit wrote:
> When page-table entries are set, the compiler might optimize their
> assignment by using multiple instructions to set the PTE. This might
> turn into a security hazard if the user somehow manages to use the
> interim PTE. L1TF does not make our lives easier, making even an interim
> non-present PTE a security hazard.
> 
> Using WRITE_ONCE() to set PTEs and friends should prevent this potential
> security hazard.

But, our types are already 64-bit, and we're doing a 64-bit pointer
write.  Our WRITE_ONCE() implementation boils down to:

static __always_inline void __write_once_size(...
{
        switch (size) {
	...
        case 8: *(volatile __u64 *)p = *(__u64 *)res; break;


For 64-bit types, which is precisely the same thing.  Right?

So, while I agree that it's nice to document the need for a full 64-bit
"atomicity" of the PTE set, I don't see a practical problem here with
our implementation.

There's probably a massive number of things that would break if we
assumed sane 64-bit writes can be observed piecemeal.

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