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Date:   Mon, 10 Sep 2018 16:51:34 +0100
From:   Lee Jones <lee.jones@...aro.org>
To:     Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
Cc:     Hans de Goede <hdegoede@...hat.com>, linux-kernel@...r.kernel.org,
        Mika Westerberg <mika.westerberg@...ux.intel.com>
Subject: Re: [PATCH v1 4/7] mfd: intel_soc_pmic_bxtwc: Chain power button
 IRQs as well

On Thu, 30 Aug 2018, Andy Shevchenko wrote:

> Power button IRQ actually has a second level of interrupts to
> distinguish between UI and POWER buttons. Moreover, current
> implementation looks awkward in approach to handle second level IRQs by
> first level related IRQ chip.
> 
> To address above issues, split power button IRQ to be chained as well.
> 
> Signed-off-by: Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
> ---
>  drivers/mfd/intel_soc_pmic_bxtwc.c | 41 ++++++++++++++++++++++--------
>  include/linux/mfd/intel_soc_pmic.h |  1 +
>  2 files changed, 32 insertions(+), 10 deletions(-)

Applied, thanks.

-- 
Lee Jones [李琼斯]
Linaro Services Technical Lead
Linaro.org │ Open source software for ARM SoCs
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