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Message-ID: <20180911103828.GF12094@zn.tnic>
Date: Tue, 11 Sep 2018 12:38:28 +0200
From: Borislav Petkov <bp@...en8.de>
To: Pu Wen <puwen@...on.cn>
Cc: tglx@...utronix.de, mingo@...hat.com, hpa@...or.com,
x86@...nel.org, thomas.lendacky@....com, pbonzini@...hat.com,
linux-kernel@...r.kernel.org, linux-arch@...r.kernel.org
Subject: Re: [PATCH v6 09/16] x86/bugs: Add mitigation to spectre and no
meltdown for Hygon Dhyana
On Mon, Sep 10, 2018 at 09:17:40PM +0800, Pu Wen wrote:
> The Hygon Dhyana CPU has the same speculative execution as AMD family
> 17h, so share AMD spectre mitigation code for Hygon Dhyana.
>
> Also Hygon Dhyana is not affected by meltdown vulnerability as AMD,
> so add the exception for Hygon Dhyana.
>
> Signed-off-by: Pu Wen <puwen@...on.cn>
> ---
> arch/x86/kernel/cpu/bugs.c | 6 ++++--
> arch/x86/kernel/cpu/common.c | 1 +
> 2 files changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/arch/x86/kernel/cpu/bugs.c b/arch/x86/kernel/cpu/bugs.c
> index 40bdaea..726010d 100644
> --- a/arch/x86/kernel/cpu/bugs.c
> +++ b/arch/x86/kernel/cpu/bugs.c
> @@ -312,8 +312,9 @@ static enum spectre_v2_mitigation_cmd __init spectre_v2_parse_cmdline(void)
> }
>
> if (cmd == SPECTRE_V2_CMD_RETPOLINE_AMD &&
> + boot_cpu_data.x86_vendor != X86_VENDOR_HYGON &&
> boot_cpu_data.x86_vendor != X86_VENDOR_AMD) {
> - pr_err("retpoline,amd selected but CPU is not AMD. Switching to AUTO select\n");
> + pr_err("retpoline,amd selected but CPU is not AMD or Hygon. Switching to AUTO select\n");
Didn't we say, no user-visible changes pls?
--
Regards/Gruss,
Boris.
Good mailing practices for 400: avoid top-posting and trim the reply.
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