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Message-Id: <088724896f21d556ecf1e16a6c59c0e404444fa6.1536744310.git.amit.kucheria@linaro.org>
Date:   Wed, 12 Sep 2018 15:22:54 +0530
From:   Amit Kucheria <amit.kucheria@...aro.org>
To:     linux-kernel@...r.kernel.org
Cc:     rnayak@...eaurora.org, linux-arm-msm@...r.kernel.org,
        bjorn.andersson@...aro.org, edubezval@...il.com,
        smohanad@...eaurora.org, andy.gross@...aro.org,
        dianders@...omium.org, mka@...omium.org,
        David Brown <david.brown@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Mark Rutland <mark.rutland@....com>, linux-soc@...r.kernel.org,
        devicetree@...r.kernel.org
Subject: [PATCH v3 09/16] arm: dts: msm8974: thermal: split address space into two

We've earlier added support to split the register address space into TM
and SROT regions. Split up the regmap address space into two for msm8974
that has a similar register layout.

Since tsens-common.c/init_common() currently only registers one address
space, the order is important (TM before SROT).  This is OK since the
code doesn't really use the SROT functionality yet.

Signed-off-by: Amit Kucheria <amit.kucheria@...aro.org>
Reviewed-by: Matthias Kaehlcke <mka@...omium.org>
---
 arch/arm/boot/dts/qcom-msm8974.dtsi | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index d9019a49b292..56dbbf788d15 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -427,9 +427,10 @@
 			};
 		};
 
-		tsens: thermal-sensor@...a8000 {
+		tsens: thermal-sensor@...a9000 {
 			compatible = "qcom,msm8974-tsens";
-			reg = <0xfc4a8000 0x2000>;
+			reg = <0xfc4a9000 0x1000>, /* TM */
+			      <0xfc4a8000 0x1000>; /* SROT */
 			nvmem-cells = <&tsens_calib>, <&tsens_backup>;
 			nvmem-cell-names = "calib", "calib_backup";
 			#thermal-sensor-cells = <1>;
-- 
2.17.1

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