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Message-ID: <f553018d-d27a-68e0-93f7-4f7a0497c68a@arm.com>
Date: Wed, 12 Sep 2018 10:39:34 -0500
From: Jeremy Linton <jeremy.linton@....com>
To: Jeffrey Hugo <jhugo@...eaurora.org>, rjw@...ysocki.net,
linux-acpi@...r.kernel.org
Cc: linux-kernel@...r.kernel.org, vkilari@...eaurora.org,
Sudeep Holla <sudeep.holla@....com>
Subject: Re: [PATCH] ACPI/PPTT: Handle architecturally unknown cache types
Hi,
On 09/12/2018 09:41 AM, Jeffrey Hugo wrote:
> The HW designers have indicated that there is no sane way to provide
> sets/ways information to software, even on an informational basis (ie
> not for cache maintenance, but for performance optimizations). Therefore
> the firmware will not provide this information because it will be wrong.
>
> So, therefore, we should still be able to tell the user that a cache
> exists at the relevant level, and what size it is. On the concerned
> system, we cannot do that currently.
Ok, so set the fields to zero in firmware node, and mark them valid.
That logically says that there isn't any set/way information for the
cache (which implies direct mapped).
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