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Message-ID: <2c481986-7ee0-4887-5c9b-64e2cd9d8c04@kaod.org>
Date: Thu, 13 Sep 2018 18:35:38 +0200
From: Cédric Le Goater <clg@...d.org>
To: Guenter Roeck <linux@...ck-us.net>
Cc: Jae Hyun Yoo <jae.hyun.yoo@...ux.intel.com>,
Joel Stanley <joel@....id.au>, linux-aspeed@...ts.ozlabs.org,
Vernon Mauery <vernon.mauery@...ux.intel.com>,
OpenBMC Maillist <openbmc@...ts.ozlabs.org>,
Brendan Higgins <brendanhiggins@...gle.com>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
linux-i2c@...r.kernel.org, jarkko.nikula@...ux.intel.com,
Linux ARM <linux-arm-kernel@...ts.infradead.org>,
James Feist <james.feist@...ux.intel.com>
Subject: Re: [PATCH i2c-next v6] i2c: aspeed: Handle master/slave combined irq
events properly
On 09/13/2018 05:57 PM, Guenter Roeck wrote:
> On Thu, Sep 13, 2018 at 05:48:59PM +0200, Cédric Le Goater wrote:
>> On 09/13/2018 03:33 PM, Guenter Roeck wrote:
> [ ... ]
>>>>> /*
>>>>> * The state machine needs some refinement. It is only used to track
>>>>> * invalid STOP commands for the moment.
>>>>> @@ -188,7 +215,7 @@ static void aspeed_i2c_bus_handle_cmd(AspeedI2CBus *bus, uint64_t value)
>>>>> {
>>>>> bus->cmd &= ~0xFFFF;
>>>>> bus->cmd |= value & 0xFFFF;
>>>>> - bus->intr_status = 0;> + bus->intr_status &= I2CD_INTR_RX_DONE;
>>>>
>>>> it deserves a comment to understand which scenario we are trying to handle.
>>>>
>>>
>>> Ok. FWIW, I wonder if intr_status should be touched here in the first place,
>>> but I neither have the hardware nor a datasheet, so I don't know if any bits
>>> are auto-cleared.
>>
>> I just pushed a patch on my branch with some more explanation :
>>
>> https://github.com/legoater/qemu/commits/aspeed-3.1
>>
> That seems to suggest that none of the status bits auto-clears, and that
> the above code clearing intr_status should be removed entirely.
> Am I missing something ?
You are right. I just pushed another version of the previous patch with this
new hunk :
@@ -188,7 +200,6 @@ static void aspeed_i2c_bus_handle_cmd(As
{
bus->cmd &= ~0xFFFF;
bus->cmd |= value & 0xFFFF;
- bus->intr_status = 0;
if (bus->cmd & I2CD_M_START_CMD) {
uint8_t state = aspeed_i2c_get_state(bus) & I2CD_MACTIVE ?
The QEMU palmetto and witherspoon machines seem to behave fine. Can you give
it a try ?
Thanks,
C.
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