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Message-Id: <1537195934-26035-1-git-send-email-dinguyen@kernel.org>
Date:   Mon, 17 Sep 2018 09:52:14 -0500
From:   Dinh Nguyen <dinguyen@...nel.org>
To:     daniel.lezcano@...aro.org
Cc:     dinguyen@...nel.org, tglx@...utronix.de,
        linux-kernel@...r.kernel.org, Marek Vasut <marex@...x.de>
Subject: [PATCH] clocksource: dw_apb: add reset control

Add code to retrieve the reset property for the dw-apb timers.

Signed-off-by: Marek Vasut <marex@...x.de>
Signed-off-by: Dinh Nguyen <dinguyen@...nel.org>
---
 drivers/clocksource/dw_apb_timer_of.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/clocksource/dw_apb_timer_of.c b/drivers/clocksource/dw_apb_timer_of.c
index 69866cd..24bc073 100644
--- a/drivers/clocksource/dw_apb_timer_of.c
+++ b/drivers/clocksource/dw_apb_timer_of.c
@@ -22,6 +22,7 @@
 #include <linux/of_address.h>
 #include <linux/of_irq.h>
 #include <linux/clk.h>
+#include <linux/reset.h>
 #include <linux/sched_clock.h>
 
 static void __init timer_get_base_and_rate(struct device_node *np,
@@ -29,12 +30,20 @@ static void __init timer_get_base_and_rate(struct device_node *np,
 {
 	struct clk *timer_clk;
 	struct clk *pclk;
+	struct reset_control *rstc;
 
 	*base = of_iomap(np, 0);
 
 	if (!*base)
 		panic("Unable to map regs for %s", np->name);
 
+	/* Unreset the timer if applicable */
+	rstc = of_reset_control_get(np, NULL);
+	if (!IS_ERR(rstc)) {
+		reset_control_assert(rstc);
+		reset_control_deassert(rstc);
+	}
+
 	/*
 	 * Not all implementations use a periphal clock, so don't panic
 	 * if it's not present
-- 
2.7.4

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